參數(shù)資料
型號: TMP90CM38
廠商: Toshiba Corporation
元件分類: 通用總線功能
英文描述: High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter,Signal Selector Circuit,PWM Output(高速、先進的 CMOS 8位微控制器(芯片集成了8位A/D,D/A轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時器/事件計數(shù)器,信號選擇電路,PWM輸出))
中文描述: 采用先進的CMOS高速8位微控制器,集成8位A / D,D / A轉(zhuǎn)換,內(nèi)存,光盤,通用串行接口,Multifuction定時器/事件計數(shù)器,信號選擇器電路,PWM輸出(高速,先進的的CMOS 8位微控制器(芯片集成了8位A / D轉(zhuǎn)換,數(shù)/模轉(zhuǎn)換器,ROM和RAM內(nèi)存,通用串行接口,多功能定時器/事件計數(shù)器,信號選擇電路,脈寬調(diào)制輸出))
文件頁數(shù): 107/172頁
文件大?。?/td> 5946K
代理商: TMP90CM38
TOSHIBA CORPORATION
107
TMP90CM38
3.8.2 Pattern Generation Mode
SMC functions as a pattern generation port according to the
setting of P29FR <PAT1>/<PAT0>. In this mode, becuase writ-
ing from CPU is executed only on the shifter alternate register,
writing ports 2 and 9 can be done during the interrupt opera-
tion of the timer for shift trigger and a pattern can be output,
synchronous with the timer .
In this mode, P29FR <M1M>/<M0M> must be always set
to “1”.
Figure 3.8 (5) shows the block diagram of this mode.
Figure 3.8 (5). Pattern Generation Mode Block Diagram (Port 2)
In this pattern generation mode, only writing the output
latch is disabled by hardware, but other functions do the same
operation as 1-2 excitation in stepping motor control port
mode. Accordingly, the data shifted by trigger signal from a
timer must be written before the next trigger signal is output.
相關(guān)PDF資料
PDF描述
TMP90CM40 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CUP,A/D Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter(高速、先進的 CMOS 8位微控制器(芯片集成了8位CPU,A/D,轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時器/事件計數(shù)器))
TMP90P800 A System Evaluation LSI With One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(帶一次可編程ROM(8192 x 8位),RAM(256 x 8位))
TMP90P802 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(8192 x 8位),RAM(256 x 8位))
TMP90PH02 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(16384 x 8位),RAM(512 x 8位))
TMP90PH44 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(16384 x 8位),RAM(512 x 8位))
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