參數(shù)資料
型號: TMP90CM38
廠商: Toshiba Corporation
元件分類: 通用總線功能
英文描述: High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D,D/A Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter,Signal Selector Circuit,PWM Output(高速、先進(jìn)的 CMOS 8位微控制器(芯片集成了8位A/D,D/A轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時(shí)器/事件計(jì)數(shù)器,信號選擇電路,PWM輸出))
中文描述: 采用先進(jìn)的CMOS高速8位微控制器,集成8位A / D,D / A轉(zhuǎn)換,內(nèi)存,光盤,通用串行接口,Multifuction定時(shí)器/事件計(jì)數(shù)器,信號選擇器電路,PWM輸出(高速,先進(jìn)的的CMOS 8位微控制器(芯片集成了8位A / D轉(zhuǎn)換,數(shù)/模轉(zhuǎn)換器,ROM和RAM內(nèi)存,通用串行接口,多功能定時(shí)器/事件計(jì)數(shù)器,信號選擇電路,脈寬調(diào)制輸出))
文件頁數(shù): 112/172頁
文件大?。?/td> 5946K
代理商: TMP90CM38
112
TOSHIBA CORPORATION
TMP90CM38
Setting Example: To drive channel 0 (M0) by 4-phase 1-2
step excitation (normal rotation) when
timer 0 is selected, set each register as
follows.
3.8.4 Trigger Signal From Timer
The trigger signal from the timer which is used by SMC is not
equal to the reverse trigger signal of each timer flip-flop (TFF1,
TFF3, TFF4, and TFF5) and differs as shown in Table 3.8 (1)
depending on the operation mode of the timer.
Note: To shift SMC, TFFCR <FF1IE> must be set to “1” to enable TFF1 inversion.
Table 3.8 (1) 8-Bit Timers 0 and 1 (Same for timers 2 and 3)
TFF1 inversion
SMC shift
8-bit timer mode
Selected by TFFCR0 (FF1IS) when the up-counter value matches
TREG0 or TREG1 value
16-bit timer mode
When the up-counter value matches with both TREG0 and TREG1
values (The value of up-counter = TREG1*2
8
+ TREG0)
PPG output mode
When the up-counter value matches with both TREG0 and TREG1
When the up counter value matches TREG1 value (PPG cycle)
PWM output mode
When the up-counter value matches TREG0 value at PWM cycle.
Trigger signal for SMC shift is not output.
Channel 1 of SMC can by synchronized with the 16-bit
timer. In this case, the SMC shift register trigger signal from the
16-bit timer is output only when the up-counter value matches
TREG5. Set either T4FFCR <EQ5T4> or T4MOD <EQ5T5> to “1”.
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