- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19457 > TMS320VC5409ZGU-80 (Texas Instruments)IC FIXED POINT DSP 144-BGA PDF資料下載
參數(shù)資料
| 型號： | TMS320VC5409ZGU-80 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 11/93頁 |
| 文件大小： | 0K |
| 描述： | IC FIXED POINT DSP 144-BGA |
| 標準包裝： | 160 |
| 系列： | TMS320C54x |
| 類型： | 定點 |
| 接口： | 主機接口，McBSP |
| 時鐘速率： | 80MHz |
| 非易失內(nèi)存： | ROM（32 kB） |
| 芯片上RAM： | 64kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.80V |
| 工作溫度： | -40°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 144-BGA MICROSTAR（12x12） |
| 包裝： | 托盤 |
| 配用： | 296-15829-ND - DSP STARTER KIT FOR TMS320C5416 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁
Introduction
19
April 1999 Revised October 2008
SPRS082F
Table 22. Terminal Functions (Continued)
TERMINAL
NAME
DESCRIPTION
I/O
INTERNAL
TERMINAL
NAME
DESCRIPTION
I/O
PIN STATE
HOST-PORT INTERFACE SIGNALS (CONTINUED)
HCNTL0
HCNTL1
Pullup
resistor
I
Control. HCNTL0 and HCNTL1 select a host access to one of the three HPI registers. The control
inputs have internal pullup resistors that are only enabled when HPIENA = 0.
HBIL
Pullup
resistor
I
Byte identification. HBIL identifies the first or second byte of transfer. The HBIL input has an internal
pullup resistor that is only enabled when HPIENA = 0.
HCS
Schmitt
trigger/pullup
resistor
I
Chip select. HCS is the select input for the HPI and must be driven low during accesses. The
chip-select input has an internal pullup resistor that is only enabled when HPIENA = 0.
HDS1
HDS2
Schmitt
trigger/pullup
resistor
I
Data strobe. HDS1 and HDS2 are driven by the host read and write strobes to control transfers. The
strobe inputs have internal pullup resistors that are only enabled when HPIENA = 0.
HAS
Schmitt
trigger/pullup
resistor
I
Address strobe. Hosts with multiplexed address and data pins require HAS to latch the address in
the HPIA register. HAS has an internal pullup resistor that is only enabled when HPIENA = 0.
HR/W
Pullup
resistor
I
Read/write. HR/W controls the direction of an HPI transfer. R/W has an internal pullup resistor that
is only enabled when HPIENA = 0.
HRDY
O/Z
Ready. The ready output informs the host when the HPI is ready for the next transfer. HRDY goes
into the high-impedance state when OFF is low.
HINT
O/Z
Interrupt. This output is used to interrupt the host. When the DSP is in reset, HINT is driven high
.
The signal goes into the high-impedance state when OFF is low.
HPIENA
Pulldown
resistor
I
HPI module select. HPIENA must be driven high during reset to enable the HPI. An internal
pulldown resistor is always active and the HPIENA pin is sampled on the rising edge of RS. If
HPIENA is left open or is driven low during reset, the HPI module is disabled. Once the HPI is
disabled, the HPIENA pin has no effect until the 5409 is reset.
HPI16
Pulldown
resistor
I
HPI 16-bit select pin (internal pulldown, default HPI8). HPI16 = 1 selects the non-multiplexed mode.
The non-multiplexed mode allows hosts with separate address/data buses to access the HPI
address range via the 16 address pins (A15–A0). 16-bit data is also accessible through pins D0
through D15. Host-to-DSP and DSP-to-Host interrupts are not supported. There are no HPIC and
HPIA register accesses in the non-multiplexed mode.
The HPI16 pin is sampled at RESET. The user should never change the value of the HPI16 pin while
the RESET signal is HIGH.
SUPPLY PINS
CVDD
S
+VDD. Dedicated 1.8-V power supply for the core CPU
DVDD
S
+VDD. Dedicated 3.3-V power supply for the I/O pins
VSS
S
Ground
I = Input, O = Output, Z = High-impedance, S = Supply
Although this pin includes an internal pulldown resistor, a 470- external pulldown is required. If the TRST pin is connected to multiple DSPs,
a buffer is recommended to ensure the VIL and VIH specifications are met.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AYM30DRSS | CONN EDGECARD 60POS DIP .156 SLD |
| ASM30DRSS | CONN EDGECARD 60POS DIP .156 SLD |
| TMS320VC5409GGU-80 | IC FIXED POINT DSP 144-BGA |
| HSM06DSXH | CONN EDGECARD 12POS DIP .156 SLD |
| AGM30DRSS | CONN EDGECARD 60POS DIP .156 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320VC5410AGGU1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TMS320VC5410AGGU12 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320VC5410AGGU16 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320VC5410APGE12 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320VC5410APGE16 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。