參數(shù)資料
型號: TMX320F2810GHHS
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: DIGITAL SIGNAL PROCESSORS
中文描述: 數(shù)字信號處理器
文件頁數(shù): 92/103頁
文件大小: 1341K
代理商: TMX320F2810GHHS
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
APRIL 2001
REVISED SEPTEMBER 2001
92
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
GPIO mux (continued)
Table 68. GPEMUX, GPEDIR Register Bit Definitions
GPEMUX BIT
PERIPHERAL NAME (BIT = 1)
GPIO NAME
(BIT = 0)
GPEDIR BIT
TYPE
RESET
INPUT
QUAL
Interrupts:
0
XINT1_XBIO (I)
GPIOE0
0
R/W
0
yes
1
XINT2_ADCSOC (I)
GPIOE1
1
R/W
0
yes
2
XNMI_XINT13 (I)
GPIOE2
2
R/W
0
yes
3
reserved
GPIOE3
3
R/W
0
4
reserved
GPIOE4
4
R/W
0
5
reserved
GPIOE5
5
R=0
0
6
reserved
GPIOE6
6
R=0
0
7
reserved
GPIOE7
7
R=0
0
8
reserved
GPIOE8
8
R=0
0
9
reserved
GPIOE9
9
R=0
0
10
reserved
GPIOE10
10
R=0
0
11
reserved
GPIOE11
11
R=0
0
12
reserved
GPIOE12
12
R=0
0
13
reserved
GPIOE13
13
R=0
0
14
reserved
GPIOE14
14
R=0
0
15
reserved
GPIOE15
15
R=0
0
Table 69. GPEQUAL Register Bit Definitions
BIT
NAME
TYPE
RESET
DESCRIPTION
7:0
QUALPRD
R/W
0:0
Specifies the qualification sampling period:
0x00
no qualification (just SYNC to SYSCLKOUT)
0x01
QUALPRD = SYSCLKOUT/2
0x02
QUALPRD = SYSCLKOUT/4
.
0xFF
QUALPRD = SYSCLKOUT/510
15:8
reserved
R=0
0:0
P
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