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參數(shù)資料
| 型號： | TPS2459RHB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC32 |
| 封裝： | PLASTIC, QFN-32 |
| 文件頁數(shù)： | 14/48頁 |
| 文件大?。?/td> | 852K |
| 代理商： | TPS2459RHB |
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SLUS917D – FEBRUARY 2009 – REVISED MAY 2010
Table 7. Register 7: Latched Channel Status Indicators (Read-only, cleared on read)
BIT
NAME
DEFAULT
DESCRIPTION
0
spare
1
spare
–
2
spare
3
spare
Latches high when OUT12 goes from above VTH_PG to below VTH_PG. This bit is set
4
12PG
0
each time channel is turned on. A second read cycle will indicate true status.
5
12FLT
0
Latches high when 12-V fault timer has run out.
Latches high when OUT3 goes from above VTH_PG to below VTH_PG. This bit is set each
6
3PG
0
time channel is turned on. A second read cycle will indicate true status.
7
3FLT
0
Latches high when 3 V fault timer has run out.
12PG
This bit is set if the voltage on OUT12 drops below the power-good threshold set by the 12PG[1:0] bits, and it remains set
until Register 7 is read.
12FLT
This bit is set if the fault timer on the 12-V channel has run out, and it remains set until Register 7 is read.
3PG
This bit is set if the voltage on OUT3 drops below the power-good threshold, and it remains set until Register 7 is read.
3FLT
This bit is set if the fault timer on the 3.3-V channel runs out, and it remains set until Register 7 is read.
Table 8. Register 8: Latched Status Indicators (Read-only, cleared on read)
BIT
NAME
DEFAULT
DESCRIPTION
0
spare
1
spare
–
2
spare
3
spare
4
12OC
0
Latches high when 12-V channel enters overcurrent.
5
12FTR
0
Latches high if 12-V fast trip threshold exceeded.
6
3BOC
0
Latches high when 3 V channel enters over-current.
7
3BFTR
0
Latches high if 3 fV ast trip threshold exceeded.
12OC
This bit is set if the voltage on the PASS pin drops below the timer start threshold, signifying a current limit condition. This bit
remains set until Register 8 is read. This bit is set each time channel is turned on. A second read cycle after turn on is
required to determine true status.
12FTR
This bit is set if the voltage across the sense resistor for the 12-V channel exceeds the fast trip threshold. This bit remains set
until Register 8 is read. This bit remains set until Register 8 is read. This bit is set each time channel is turned on. A second
read cycle after turn on is required to determine true status.
3OC
This bit is set if the gate-to-source voltage on the 3 V channel pass FET drops low enough to start the fault timer. This bit
remains set until Register 8 is read. This bit remains set until Register 8 is read. This bit is set each time channel is turned
on. A second read cycle after turn on is required to determine true status.
3FTR
This bit is set if the current through the 3 V channel exceeds the fast trip threshold. This bit remains set until Register 8 is
read.
X
Copyright 2009–2010, Texas Instruments Incorporated
21
Product Folder Link(s): TPS2459
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