參數(shù)資料
型號(hào): TPS2459RHB
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 2-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC32
封裝: PLASTIC, QFN-32
文件頁(yè)數(shù): 44/48頁(yè)
文件大小: 852K
代理商: TPS2459RHB
www.ti.com
SLUS917D – FEBRUARY 2009 – REVISED MAY 2010
ELECTRICAL CHARACTERISTICS (continued)
over –40°C
≤ TJ ≤ 85°C, VIN3 =VVDD3 = 3.3 V, VIN12 = VSENP = VSENM = VSETP = 12 V, VEN3=VEN12=logic 1 or open, VAGND =
VGNDA = VGNDB = 0 V, VSUM12 = 6.8 k to GND, , VSUM3 = 3.3 k to GND. All other pins OPEN, all I
2C bits at different values,
all voltages referenced to GND. (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I2C SERIAL INTERFACE (SDA, SCL, A0, A1, A2)
Lower logic threshold
A0, A1, A2
0.33
0.35
0.37
V
Upper logic threshold
A0, A1, A2
1.32
1.35
1.38
V
Input pullup resistance
A0, A1, A2, (VAx – 0 V)
400
700
1000
k
Input pulldown resistance
A0, A1, A2, (VAx – VVINT)
(2)
200
350
550
k
Input open-circuit voltage
IA = 0 V
0.5
0.8
1.0
V
Threshold voltage, rising
SDA, SCL
2.3
V
Threshold voltage, falling
SDA, SCL
1.0
V
Hysteresis
SDA, SCL
165
mV
Leakage
SDA, SCL
1
mA
Input clock frequency
SCL
400
kHz
Low-level output voltage
ISDA = 3 mA
0.4
V
Input clock low duration
SCL
1.3
ms
Input clock high duration
SCL
0.6
ms
Data setup time
SDA
100
ns
Data hold time
SDA
300
900
ns
SDA, 2.3 V–1.0 V, CBUS = 10 pF
21
250
Output fall time
ns
SDA, 2.3 V–1.0 V, CBUS = 400 pF
60
250
Deglitch time
SDA, pulse width suppressed
0
50
ns
Capacitance
CSDA, CSCL
10
pF
(2)
When setting an address bit to a logic 1 the pin should be connected to VINT.
Copyright 2009–2010, Texas Instruments Incorporated
5
Product Folder Link(s): TPS2459
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