參數(shù)資料
型號: TS68332MR16
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: High performance 32-bit integrated microcontroller
中文描述: 32-BIT, 16.78 MHz, MICROCONTROLLER, CPGA132
封裝: CERAMIC, PGA-132
文件頁數(shù): 41/56頁
文件大?。?/td> 1510K
代理商: TS68332MR16
41
TS68332
2118A–HIREL–03/02
TwelveProgrammableChip-
selectCircuits
Twelvechipselectsignalsareavailable(CSBOOT)andCS10troCSO).Thesesignals
usetheCSBOOTpin,busarbitrationpinsBR,BG,andBGACK,functioncodepins
FC2-FC0,andaddresspinsA23-A19.The(CSBOOT)pinisdedicatedtoasinglefunc-
tionbecauseitmustfunctionafteraresetwithnoinitialization,theotherchipselect
circuitssharefunctionsontheiroutputpins.All12chipselectcircuitsareindependently
programmablefromthesamelistofselectablefeatures.Eachchipselectcircuithasan
individualbaseregisterandoptionregisterwhichcontaintheprogrammablecharacter-
isticsofthatchipselect.Usingtheseaddresslinesaschipselectsignalsdoesnot
restrictthelargelinearaddressspaceoftheMCUsincethechipselectlogicalways
usestheinternaladdresslines.
VariableBlockSizes
Theblocksizestartingfromthespecifiedbaseaddresscanbeprogrammedas2K,8K,
16K,64K,128K,256K,512Kbytesor1-Mbyte.
Both8-bitand16-bitPorts
Supported
Eight-bitportsareaccessibleonbothoddandevenaddresseswhenconnectedtodata
busbits15-8.Sixteen-bitportscanbeaccessedasoddbytes,evenbytes,orwords.
ReadOnly,WriteOnly,or
Read/writeCapability
Chipselectscanbeassertedsynchronizedwithread,write,orbothreadandwrite.
AddressStrobeandDataStrobe
TimingOption
Chip-selectsignalscanbesynchronizedwitheitheraddressstrobeordatastrobe,so
thatcontrolsignalssuchasoutputenableorwriteenablecanbeeasilygenerated.
InternalDSACKGeneration
withWaitStates
Theportprogrammedinthepinassignmentregistercanbereferencedforgenerating
DSACKandthepropernumberofwaitstatesforaparticulardeviceprogrammedbythe
user.
AddressSpaceChecking
Supervisor,user,andCPUspaceaccessescanbeoptionallychecked.
InterruptPriorityLevel
Checking
IntheIACKcycle,theacknowledgedinterruptlevelcanbecomparedwiththeuser-
specifiedlevelprogrammedintheoptionfield.Ifautovectoroptionisselected,AVECis
internallyasserted.
DiscreteOutput
PortCpinsA22-A19andFC2-FC0canbeprogrammedfordiscreteoutput,withdata
storedinthepindataregister(CSPDR).
68000-typePeripheralSupport
68000-typeperipheralsthatrequireanEclockforsynchronizationcanbesupported.
Chipselectisasserted,synchronizedwiththeEclockonpinA23,providingcorrectdata
bustimingfortheMCU.
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