參數(shù)資料
型號(hào)： TS68332MR16
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： High performance 32-bit integrated microcontroller
中文描述： 32-BIT, 16.78 MHz, MICROCONTROLLER, CPGA132
封裝： CERAMIC, PGA-132
文件頁(yè)數(shù)： 44/56頁(yè)
文件大?。?/td> 1510K
代理商： TS68332MR16
44
TS68332
2118A–HIREL–03/02
WraparoundTransferMode:
Wraparoundtransfermodeallowsforautomatic,continu-
ousre-executionofthepreprogrammedqueueentries.Newlytransferreddatareplaces
previouslytransferreddata.WraparoundsimplifiesinterfacingwithA/Dconvertersby
automaticallyprovidingtheCPUwiththelatestconversionsintheQSPIRAM.Conse-
quently,serialperipheralsappearasmemory-mappedparalleldevicestotheCPU.
ProgrammableTransferLength:
Thenumberofbitsinaserialtransferisprogrammable
from8to16bits,inclusive.Forexample,10-bitscouldbeusedforcommunicatingwith
anexternal10-bitsA/Dconvertor.Likewise,avacuumfluorescentdisplaydrivermight
requirea12-bitsserialtransfer.Theprogrammablelengthsimplifiesinterfacingtoserial
peripheralsthatrequiredifferentdatalengths.
ProgrammableTransferDelay:
Aninter-transferdelaymaybeprogrammedfrom
approximately1to500μs(usinga16.78MHzsystemclock).Forexample,anA/Dcon-
vertormayrequiretimebetweentransferstocompleteanewconversion.Thedefault
delayis1μs.Theprogrammablelengthofdelaysimplifiesinterfacingtoserialperipher-
alsthatrequiredelaytimebetweendatatransfers.
ProgrammableQueuePointer:
TheQSPIhasapointerthatpointstothequeuelocation
containingthedataforthenextserialtransfer.TheCPUcanswitchfromonetaskto
anotherintheQSPIbywritingtothequeuepointer,changingthelocationinthequeue
thatistobetransferrednext.Otherwise,thepointerincrementsaftereachserialtrans-
fer.Bysegmentingthequeue,multiple-tasksupportcanbeprovidedbytheQSPI.
ContinuousTransferMode:
Thecontinuoustransfermodeallowstheusertoexchange
anuninterruptedbitstreamwithaperipheral.Aminimumof8-bitsandamaximumof
256-bitsmaybetransferredinasingleburstwithoutCPUintervention.Longertransfers
arepossible;however,minimalCPUinterventionisrequiredtopreventlossofdata.A
1microsecondpause(usinga16.78MHzsystemclock)isinsertedbetweeneachentry
transfer.
QSPIRAM:
TheQSPIusesan80-byteblockofdual-accessstaticRAMthatcanbe
accessedbyboththeQSPIandtheCPU.Becauseofsharing,thelengthoftimetaken
bytheCPUtoaccesstheQSPIRAM,whentheQSPIisenabled,maybelongerthan
whentheQSPIisdisabled.FromonetofourCPUwaitstatesmaybeinsertedbythe
QSPIintheprocessofreadingorwriting.
TheRAMisdividedintothreesegments:receivedata,transmitdata,andcommand
control.ReceivedataisinformationreceivedfromaserialdeviceexternaltotheMCU.
TransmitdataisinformationstoredbytheCPUfortransmissiontoanexternalperiph-
eralchip.CommandcontrolcontainsalltheinformationneededbytheQSPItoperform
thetransfer.Figure24illustratestheorganizationoftheRAM.
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