參數(shù)資料
型號： TSC2302IRGZR
元件分類： Codec
英文描述： PROGRAMMABLE TOUCH SCREEN CONTROLLER WITH STEREO AUDIO CODEC
中文描述： 可編程觸摸屏控制器，立體聲編解碼器
文件頁數(shù)： 69/81頁
文件大?。?/td> 1211K
代理商： TSC2302IRGZR
www.ti.com
www.ti.com
TSC2302
SLAS394–JULY 2003
Bit 7 — ADMUR
Right ADC Mute. This bit is used to mute the input to the right channel ADC. The user can set this bit to mute the
ADC while retaining the previous gain setting in ADVR[6:0], so that the PGA returns to the previous gain setting
when ADMUR is cleared. When the ADMUR bit is set, the right ADC PGA soft-steps down to its lowest level,
then mutes. This procedure is used to reduce any audible artifacts (
pops or clicks
) during the mute operation.
This soft-stepping process is reversed when the ADMUR bit is cleared (unmute).
Table 33. Right ADC Mute
ADMUR
DESCRIPTION
0
Right channel ADC is active.
1
Right channel ADC is mute. (default)
Bits [6:0] — ADVR6- ADVR0
Right ADC Volume Control. These 7 bits control the gain setting of the right channel ADC volume control PGA.
This volume control can be programmed from -40 dB to +20 dB in 0.5-dB steps. Full volume (+20 dB)
corresponds to a setting of 7Fh. Unity gain (0 dB) corresponds to 57h. Full attenuation (-40 dB) corresponds to
07h. Any value lower than 07h engages the mute function described above. Volume control changes are always
soft-stepped, as described above. The default volume setting is 0 dB.
ADVR[6:0] = 1010111 (087d) = 0 dB (default)
ADVR[6:0] = 1111111 (127d) = +20 dB (Max)
ADVR[6:0] = 0000111 (007d) = -40 dB (Min)
ADVR[6:0] = 0d-6d = mute
DAC VOLUME CONTROL REGISTER (Page 02, Address 02h)
The DAC volume control register controls the independent digital gain controls on the left and right channel audio
DAC’s of the TSC2302. The gain of the DACs can be adjusted from -63.5 dB to 0 dB in 0.5-dB steps. The DAC
inputs can also be muted, so that all zeroes are sent to the DAC interpolation filters.
The DAC volume control register is formatted as follows:
BIT 15
MSB
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB
DAMUL
DAVL6
DAVL5
DAVL4
DAVL3
DAVL2
DAVL1
DAVL0
DAMUR
DAVR6
DAVR5
DAVR4
DAVR3
DAVR2
DAVR
1
DAVR
0
Bit 15 — DAMUL
Left DAC Mute. This bit is used to mute the input to the left channel DAC. The user can set this bit to mute the
DAC while retaining the previous gain setting in DAVL[6:0], so that the gain control returns to the previous gain
setting when DAMUL is cleared. When the DAMUL bit is set, the left DAC digital gain control soft-steps down to
its lowest level, then all zeroes are sent to the interpolation filter of this DAC. This procedure is used to reduce
any audible artifacts (
pops or clicks
) of the mute procedure. This soft-stepping process is reversed when the
DAMUL bit is cleared (unmute).
Table 34. Left DAC Mute
DAMUL
DESCRIPTION
0
Left channel DAC is active.
1
Left channel DAC is mute. (default)
69
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