1–6
1.7
Terminal Functions (Continued)
TERMINAL
NAME
NO.
DESCRIPTION
I/O
SENSE
68
O
Monitor detect (active low, TTL compatible). SENSE is logic 0 when one or more of the
RED, GREEN, or BLUE outputs has exceeded the internal voltage reference level of 340
mV
70 mV.
STROBE
6
I
Strobe for reference frequency select (TTL compatible). FS(1,0) are connected to an
internal transparent latch. When STROBE is high, data can be written to FS(1,0). When
STROBE is low, the latch is closed and data cannot be written to FS(1,0). The falling edge
of STROBE latches FS(1,0). When STROBE is tied permanently high, care must be
taken to ensure that noise does not exist on the FS(1,0) inputs.
VCCA
41, 43
Analog power. VCCA terminals connect to 5 V. These terminals supply the power for the
analog DACs and should be connected to a filtered supply plane.
VCCD
9, 27
Digital power. VCCD terminals connect to 5 V. These terminals can be connected to the
filtered supply plane or connected to the digital supply plane of the RAMDAC.
VCCS
50
Clock synthesizer power. VCCS connects to 5 V. This can be a separate supply from the
RAMDAC (see Appendix A, Application Information).
VCCM
61
Clock multiplier power. VCCM connects to 5 V. This can be a separate supply from the
RAMDAC (see Appendix A, Application Information).
WR
22
I
Write (active low, TTL compatible). WR controls the data transfer from the data bus to
the selected internal register. D(7–0) data is latched at the rising edge of WR, and
RS(1,0) data is latched at the falling edge of WR.
XIN
48
I
Crystal in. XIN is the external crystal or stable frequency source connection to the internal
crystal oscillator. The recommended frequency is a 14.318 MHz system clock. When
using a crystal, it connects across XIN and XOUT.
XOUT
49
O
Crystal out. XOUT is the external crystal connection to the internal crystal oscillator. All
passive components are integrated on-chip to implement a tuned resonant circuit. This
terminal should float when using a stable external frequency source connected to XIN.