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參數(shù)資料
| 型號： | TVP3409-135 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Advanced Video Interface PALETTE(雙PLL，視頻接口調(diào)色器真彩色CMOS) |
| 中文描述： | 先進(jìn)的視頻接口盒（雙鎖相環(huán)，視頻接口調(diào)色器真彩色的CMOS） |
| 文件頁數(shù)： | 40/57頁 |
| 文件大?。?/td> | 312K |
| 代理商： | TVP3409-135 |
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3–6
3.5.4
Clock Synthesizer (see Notes 6)
PARAMETER
TVP3409-170
TVP3409-135
UNIT
MIN
MAX
MIN
MAX
fmax3
Maximum synthesizer frequency for
OTCLKA or OTCLKB (external)
85
85
MHz
Input duty cycle, Fref, XIN, and XOUT
45%
55%
45%
55%
Duty cycle, OTCLKA or OTCLKB
45%
55%
45%
55%
tw3
tsu5
th5
NOTE 6. TTL level input values are 0 V to 3 V, with input rise/fall times
≤
3 ns, measured from 10% to 90% points. Timing
reference points are 50% for both inputs and outputs. Digital output load
≤
15 pF. Crystal or reference
frequency = 14.318 MHz, OTCLKA or OTCLKB loading
≤
15 pF.
3.6
Switching Characteristics
3.6.1
DAC Performance (see Note 3)
Pulse duration, high or low, STROBE
20
20
ns
Setup time, FS(1,0) to STROBE
2
2
ns
Hold time, FS(1,0) to STROBE
4
4
ns
PARAMETER
TVP3409-170
MIN
TYP
TVP3409-135
MIN
TYP
UNIT
MAX
MAX
td1
tr1
ts
Delay time, analog output (see Note 11)
9
9
ns
Rise time, analog output (see Note 9)
3
3
ns
Settling time, analog output (see Note 10)
6
6
ns
μ
s
ns
Delay SENSE output
1
1
Analog output skew
3. The recommended operation condition for generating test signals is RSET = 147
, Vref = 1.235 V. TTL level
input values are 0 V to 3 V, with input rise/fall times
≤
3 ns, measured from 10% to 90% points. Timing
reference points are 50% for both inputs and outputs. Analog output load
≤
10 pF, SENSE, and D(7–0)
output load
≤
50 pF.
9. Measured between 10% to 90% of the full-scale transition.
10. Measured from the 50% point of the full-scale transition to the point at which the output has settled within
±
1 LSB (settling time does not include clock and data feed through).
11. Measured from 90% point of PCLK rising edge to 50% point of full-scale transition.
2
2
NOTES:
3.6.2
Microprocessor Port (see Note 8)
PARAMETER
TVP3409-170
MIN
TVP3409-135
MIN
UNIT
MAX
MAX
td2
ten
tdis
tv1
NOTE 8. TTL level input values are 0 V to 3 V, with input rise/fall times
≤
3 ns, measured from 10% to 90% points. Timing
reference points are 50% for both inputs and outputs.
Delay time, RD asserted to D(7–0) driven
5
5
ns
Enable time, RD asserted to D(7–0) valid
40
40
ns
Disable time, RD negated to D(7–0) 3-stated
20
20
ns
Valid time, D(7–0) valid after RD high
5
5
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TVP3703-170 | Video Interface PALETTE Exract(雙PLL，先進(jìn)的視頻接口調(diào)色器) |
| TVP3703-135 | Video Interface PALETTE Exract(雙PLL，先進(jìn)的視頻接口調(diào)色器) |
| TVP3703FN | VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC |
| TVP5020TQFP | NTSC/PAL VIDEO DECODER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3409-135CFN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3409-135FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| TVP3409-170CFN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3409-170FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
| TVP3703 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC |
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