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參數(shù)資料
| 型號： | TVP70025IPZP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | GREEN, PLASTIC, HTQFP-100 |
| 文件頁數(shù)： | 25/59頁 |
| 文件大?。?/td> | 519K |
| 代理商： | TVP70025IPZP |
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SLES232B
– JUNE 2008 – REVISED MAY 2011
Red Fine Offset MSBs
Subaddress
0Dh
Default (80h)
7
6
5
4
3
2
1
0
Red Fine Offset [9:2]
Red Fine Offset [9:2]: 8 MSBs of 10-bit fine digital offset (brightness) for Red channel (applied after ADC). Corresponding two LSBs located
at register 1Dh. Offset binary value.
The default setting of 80h places the bottom-level (RGB) clamped output blank levels at 0 and mid-level clamped (PbPr) output blank levels
at 512.
FFh = Maximum red fine offset MSBs
81h = 1 count (out of 256)
80h = 0 (default)
7Fh =
–1 count (out of 256)
00h = Minimum red fine offset MSBs
Sync Control 1
Subaddress
0Eh
Default (5Bh)
7
6
5
4
3
2
1
0
HSPO
HSIP
HSOP
AHSO
AHSS
VSOP
AVSO
AVSS
HSPO: HSYNC polarity override
0 = Polarity determined by chip (default)
1 = Polarity set by bit 6 in register 0Eh (not recommended)
HSIP: HSYNC input polarity
0 = Indicates input HSYNC polarity active low
1 = Indicates input HSYNC polarity active high (default)
HSOP: HSYNC output polarity
0 = Active-low HSYNC output (default)
1 = Active-high HSYNC output
NOTE: HSOP has no effect in raw sync bypass mode. See register 36h.
AHSO: Active HSYNC override
0 = Active HSYNC is automatically selected by TVP70025I. If selected, SOG and HSYNC inputs both have active inputs,
HSYNC is selected as the active sync source. The selected active HSYNC is provided via the AHS status bit (bit 6 of
register 14h).
1 = Active HSYNC is manually selected via the AHSS control bit (bit 3 of register 0Eh). (default)
AHSS: Active HSYNC select. The indicated HSYNC is used only if the AHSO control bit (bit 4) is set to 1 or if activity is detected on both
the selected HSYNC input and the selected SOG input (bits 1, 7 = 1 in register 14h).
0 = Active HSYNC is derived from the selected HSYNC input.
1 = Active HSYNC is derived from the selected SOG input (default).
VSOP: VSYNC output polarity
0 = Active-low VSYNC output (default)
1 = Active-high VSYNC output
AVSO: Active VSYNC override
0 = Active VSYNC is automatically selected by TVP70025I. If selected, SOG and VSYNC inputs both have active inputs,
VSYNC is selected as the active sync source. The selected active VSYNC is provided via the AVS status bit (bit 3 of
register 14h).
1 = Active VSYNC is manually selected via the AVSS control bit (bit 0 of register 0Eh) (default).
NOTE: Automatic sync selection should be enabled only for 5-wire PC graphics inputs.
AVSS: Active VSYNC select. This bit is effective when the AVSO control bit (bit 1) is set to 1.
0 = Active VSYNC is derived from the selected VSYNC input.
1 = Active VSYNC is derived from the Sync separated VSYNC (default).
Copyright
2008–2011, Texas Instruments Incorporated
31
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| TVP70025IPZPR | 功能描述:視頻模擬/數(shù)字化轉換器集成電路 Tr 8/10B,165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉換速率:3 Gbps 分辨率:8 bit 結構: 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TVP7002EVM | 功能描述:視頻 IC 開發(fā)工具 TVP7002 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評估:LMH1251 工作電源電壓:5 V |
| TVP7002PZP | 功能描述:視頻模擬/數(shù)字化轉換器集成電路 Tr 8/10B 165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉換速率:3 Gbps 分辨率:8 bit 結構: 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TVP7002PZPR | 功能描述:視頻模擬/數(shù)字化轉換器集成電路 Tr 8/10B 165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉換速率:3 Gbps 分辨率:8 bit 結構: 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TVP9000MZDSR | 制造商:Texas Instruments 功能描述: |
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