參數(shù)資料
型號: TVP70025IPZP
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: GREEN, PLASTIC, HTQFP-100
文件頁數(shù): 44/59頁
文件大?。?/td> 519K
代理商: TVP70025IPZP
SLES232B
– JUNE 2008 – REVISED MAY 2011
Lines Per Frame Status
Subaddress
37h
–38h
Read only
Subaddress
7
6
5
4
3
2
1
0
37h
Lines per Frame [7:0]
38h
Reserved
mac detect
P/I detect
Reserved
Lines per Frame [11:8]
mac detect: Macrovision pseudo-sync detection status
0 = Macrovision not detected
1 = Macrovision detected
P/I detect: Progressive/interlaced video detection status. Not dependent on the H-PLL being locked.
0 = Interlaced video detected
1 = Progressive video detected
Lines per Frame [11:0]: Number of lines per frame.
The lines per frame value may be used along with the clocks per line value (subaddresses 39h
–3Ah) to determine the vertical frequency
(fV) of the video input.
fV = clock reference frequency / clocks per line / lines per frame
NOTE: The Lines per Frame counter is not dependent on the H-PLL being locked.
Table 17. Expected Status Read-Back When Using a 27-MHz REFCLK
Clocks Per
Lines Per
HSYNC
Format
I/P Bit
HS POL
Line
Frame
Width
480i60Hz
1716
525
126
0
1
480p60Hz
858
525
63
1
576i50Hz
1728
625
126
0
1
576p50Hz
864
625
63
1
720p60Hz
600
750
14
1
1080i60Hz
800
1125
16
0
1
XGA60Hz
558
806
56
1
0
XGA75Hz
449
800
32
1
Clocks Per Line Status
Subaddress
39h
–3Ah
Read only
Subaddress
7
6
5
4
3
2
1
0
39h
Clocks per Line [7:0]
3Ah
Reserved
Clocks per Line [11:8]
Clocks per Line [11:0]: Number of clock cycles per line. The value written to this register represents the length of the longest line per frame.
A known timing reference based on either the internal clock reference (~6.5 MHz) or an external clock reference input (EXT_CLK) of up to
27 MHz may be selected using subaddress 1Ah.
The clocks per line value may be used to determine the horizontal frequency (fH) of the video input.
fH = clock reference frequency / clocks per line
NOTE: The Clocks per Line counter is not dependent on the H-PLL being locked.
HSYNC Width
Subaddress
3Bh
Read only
7
6
5
4
3
2
1
0
HSYNC width [7:0]
HSYNC width [7:0]: Number of clock cycles between the leading and trailing edges of the HSYNC input. A known timing reference based
on either the internal clock reference (~6.5 MHz) or an external clock reference input (EXT_CLK) of up to 27 MHz may be selected using
subaddress 1Ah.
NOTE: The HSYNC width counter is not dependent on the H-PLL being locked.
Copyright
2008–2011, Texas Instruments Incorporated
49
相關(guān)PDF資料
PDF描述
TVP7002PZPR SPECIALTY CONSUMER CIRCUIT, PQFP100
TVP7002PZP SPECIALTY CONSUMER CIRCUIT, PQFP100
TWL1101PFB SPECIALTY CONSUMER CIRCUIT, PQFP48
TWL1101PFBR SPECIALTY CONSUMER CIRCUIT, PQFP48
TWL1102PBS SPECIALTY CONSUMER CIRCUIT, PQFP32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP70025IPZPR 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 Tr 8/10B,165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
TVP7002EVM 功能描述:視頻 IC 開發(fā)工具 TVP7002 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評估:LMH1251 工作電源電壓:5 V
TVP7002PZP 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 Tr 8/10B 165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
TVP7002PZPR 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 Tr 8/10B 165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
TVP9000MZDSR 制造商:Texas Instruments 功能描述: