參數(shù)資料
型號(hào): TVP7002PZP
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: GREEN, PLASTIC, HTQFP-100
文件頁數(shù): 17/57頁
文件大小: 517K
代理商: TVP7002PZP
Power
Reset
I C
2
5 ms
1 s
SLES206B
– MAY 2007 – REVISED MAY 2011
Power Up, Reset, and Initialization
No specific power-up sequence is required, but all power supplies should be active and stable within 500 ms of
each other. RESETB may be low during power up, but must remain low for at least 1
μs after the power supplies
become stable. Alternatively, reset may be asserted any time with minimum 5-ms delay after power-up and must
remain asserted for at least 1
μs. Reset timing is shown in Figure 7. I2C SCL and SDA signals must not change
state until the TVP7002 reset sequence has been completed. Keeping RESETB low prior to any I2C activity will
prevent this. Table 11 shows the status of the TVP7002 terminals during and immediately after reset.
Table 11. Output Mode Per Reset Sequence State
OUTPUT MODE
SIGNAL NAME
DURING RESET
RESET COMPLETED
Default condition
R[9:0], B[9:0], G[9:0]
High impedance
(see bit 0 of subaddress 17h)
Default condition
HSOUT, VSOUT, FIDOUT, DATACLK
High impedance
(see bit 0 of subaddress 17h)
Default condition
SOGOUT
High impedance
(see bit 1 of subaddress 17h)
Figure 7. Reset Timing
24
Copyright
2007–2011, Texas Instruments Incorporated
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