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參數(shù)資料
| 型號(hào)： | UDA1380TT |
| 元件分類： | 通用總線功能 |
| 英文描述： | Stereo audio coder-decoder for MD, CD and MP3 |
| 中文描述： | 立體聲音頻編碼器，可用于MD，CD和MP3解碼器 |
| 文件頁數(shù)： | 46/68頁 |
| 文件大?。?/td> | 278K |
| 代理商： | UDA1380TT |
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2002 Sep 16
46
Philips Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
Table 59
Microphone input VGA gain setting bits
7 to 4
3
SEL_LNA
default value 0000
Line input select.
A 1-bit value to set the multiplexer in the analog front-end to select
between the LNA or the enable-in input for the left ADC. When this bit is logic 0: select
line input. When this bit is logic 1: select LNA for the left ADC. Default value 0.
Microphone input select.
A 1-bit value to set the multiplexer at the ADC right channel
output (on bit-stream level) which selects either the right channel data or the left
channel data, in case only the microphone input is used. In that case the microphone
signal can be applied to the decimator for both left and right. When this bit is logic 0:
select right channel ADC. When this bit is logic 1: select left channel ADC (for instance
for microphone input). Default value 0.
DC filter bypass.
A 1-bit value set to skip the DC filter which is just before the
decimator. This DC filter is there to compensate for the DC offset added in the ADC (to
remove idle tones from the audio band). This DC signal added (the DC dither) must
not be amplified in order to prevent clipping. Therefore this DC offset is removed first.
When this bit is logic 0: DC filter enabled. When this bit is logic 1: DC filter bypassed.
Default value 1.
DC filter enable.
A 1-bit value set to enable the DC filter which is at the output of the
decimator (running at 1f
s
). When this bit is logic 0: DC filter disabled. When this bit is
logic 1: DC filter enabled. Default value 0.
2
SEL_MIC
1
SKIP_DCFIL
0
EN_DCFIL
VGA_CTRL3
VGA_CTRL2
VGA_CTRL1
VGA_CTRL0
LNA GAIN (dB)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0 (default)
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
BIT
SYMBOL
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UDA1384 | Multichannel audio coder-decoder |
| UDA1384H | Multichannel audio coder-decoder |
| UDN2878W-2 | 10A SCRS |
| UDZ2.4B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| UDZ10B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UDA1380TT/N2 | 制造商:PHILIP 功能描述: |
| UDA1380TT/N2,512 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT/N2,518 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT-T | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1384 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multichannel audio coder-decoder |
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