參數(shù)資料
型號(hào): UPD72852A
廠商: NEC Corp.
英文描述: IEEE1394a-2000 COMPLIANT 400 Mbps TWO-PORT PHY LSI
中文描述: 1個(gè)IEEE1394a 2000年的要求400 Mbps的雙端口PHY的大規(guī)模集成電路
文件頁數(shù): 25/48頁
文件大小: 373K
代理商: UPD72852A
Data Sheet S16725EJ2V0DS
25
μ
PD72852A
(1) LREQ format
Bus Request
Table 4-5. Bus Request Format
Bit
Type
Content
0
start
Signal that starts a request : 1
1-3
request
Bus request type:
000: ImmReq acknowledge packet transmit
001: IsoReq isochronous packet transmit
010: PriReq cycle start packet transmit
011: FairReq asynchronous packet transmit
4-6
speed
Transmit speed:
000: 100 Mbps
010: 200 Mbps
100: 400 Mbps
other: reserved
7
stop
End request signal : 0 (optional)
PHY Register Read Request
Table 4-6. Read Request Register Format
Bit
Type
Content
0
start
Signal that starts a request : 1
1-3
request
Read Request.
100 : ReadReq
4-7
access address
PHY register address.
8
stop
End request signal : 0
PHY Register Write Request
Table 4-7. Write Request Register Format
Bit
Type
Content
0
start
Signal that starts a request : 1
1-3
request
Write Request.
101 : WriteReq
4-7
access address
PHY register address.
8-15
write data
Write data.
16
stop
End request signal : 0
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