參數(shù)資料
型號: UPD75517
廠商: NEC Corp.
英文描述: 4 BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機(jī)
文件頁數(shù): 30/180頁
文件大?。?/td> 1596K
代理商: UPD75517
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30
μ
PD75517(A)
(1) Data area
The data area consists of a static RAM, and is used for storing data and as stack memory for subroutine
and interrupt execution. The memory can hold data even if CPU operation is stopped in the standby mode,
so that it is suitable for holding memory contents with a battery for a long time. The data area can be
manipulated with memory manipulation instructions.
The static RAM is mapped in memory banks 0, 1, 2, and 3, with each made up of 256
×
4 bits. Bank 0 is
used as a data area, but can also be used as a general register area (000H to 01FH).
Whole addresses of memory banks 0, 1, 2, and 3 (000H to 3FFH) can be used as a stack area.
The static RAM has a configuration of four bits per address. However, use of manipulation instructions
enables 1-, 4-, and 8-bit manipulation. Note that an even address must be specified in an 8-bit manipulation
instruction.
(a) General register area
The general register area can be manipulated with either general register manipulation instructions
or memory manipulation instructions. Up to 32 4-bit registers are available. Of the 32 general
registers, registers not used by the program can be used as a data area or stack area.
(b) Stack memory area
The stack area can be allocated within a bank with the stack pointer (SP). The bank for the stack area
is selected from the memory banks 0, 1, 2, and 3 with the stack bank select register (SBS). Stack area
can be used as a save area for subroutine or interrupt execution.
Use memory manipulation instructions to manipulate the stack bank select register (SBS) and the
stack pointer (SP).
(2) Peripheral hardware area
The peripheral hardware area is mapped at addresses F80H to FFFH of memory bank 15.
Memory manipulation instructions are used to manipulate the peripheral hardware area as well as the
static RAM area. Note that, however, the number of bits to be manipulated at a time varies according to
the individual addresses. Addresses to which no peripheral hardware is assigned cannot be accessed
since such address locations contain no data memory.
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