參數(shù)資料
型號(hào)： V58C365164S5
廠商： MOSEL-VITELIC
元件分類(lèi)： DRAM
英文描述： 4M X 16 DDR DRAM, 0.1 ns, PDSO66
封裝： 0.400 INCH, PLASTIC, TSOP2-66
文件頁(yè)數(shù)： 10/44頁(yè)
文件大小： 507K
代理商： V58C365164S5
18
V58C365164S Rev. 1.5 November 2001
MOSEL VITELIC
V58C365164S
Write Interrupted by a Precharge
A Burst Write can be interrupted before completion of the burst by a Precharge command, with the only
restriction being that the interval that separates the commands be at least one clock cycle.
Write Interrupted by a Precharge Timing
Write withAutoPrecharge
If A10 is high when a Write command is issued, the Write with auto Precharge function is performed. Any
new command to the same bank should not be issued until the internal precharge is completed. The internal
precharge begins after keeping tWR (min.).
Write with Auto Precharge Timing
(CAS Latency = 2; Burst Length = 8)
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
WriteA
NOP
PreA
NOP
CK, CK
Command
DQS
T12
DM
D0 D1 D2 D3
DQ
Data is masked
by Precharge Command
Data is masked
by DM input
DQS input ignored
D4 D5
tWR
(CAS Latency = Any; Burst Length = 4)
T0
T1
T2
T3
T4
T5
T6
T7
T8
D0
D1
D2
D3
NOP
WAP
NOP
BA
CK, CK
Command
DQS
DQ
tRAS(min)
tRP(min)
BA
NOP
T9
T10
tWR(min)
Begin Autoprecharge
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