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參數(shù)資料
| 型號(hào)： | VDP3130Y |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 英文描述： | Video Processor Family |
| 中文描述： | 視頻處理器系列 |
| 文件頁(yè)數(shù)： | 17/76頁(yè) |
| 文件大?。?/td> | 1770K |
| 代理商： | VDP3130Y |
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ADVANCE INFORMATION
VDP 313xY
Micronas
17
2.10.4.Digital Brightness Adjustment
The DC-level of the luminance signal can be adjusted
by adding/subtracting an 8-bit number in the lumi-
nance signal path in front of the softlimiter.
After the brightness addition, the negative going sig-
nals are limited to zero. It is desirable to keep a small
positive offset with the signal to prevent undershoots
produced by the peaking from being cut.
2.10.5.Soft Limiter
The dynamic range of the processed luminance signal
must be limited to prevent the CRT from overload. An
appropriate headroom for contrast, peaking and bright-
ness can be adjusted by the TV manufacturer accord-
ing to the CRT characteristics. All signals above this
limit will be soft-clipped. A characteristic diagram of the
soft limiter is shown in Fig. 2
–
14. The total limiter con-
sists of three parts:
1. Part 1 includes adjustable tilt point and gain. The
gain before the tilt value is 1. Above the tilt value, a
part (0...15/16) of the input signal is subtracted from
the input signal itself. Therefore the gain is adjust-
able from 16/16 to 1/16, when the slope value varies
from 0 to 15. The tilt value can be adjusted from 0 to
511.
2. Part 2 has the same characteristics as part 1. The
subtracting part is also relative to the input signal,
so the total differential gain will become negative if
the sum of slope 1 and slope 2 is greater than 16
and the input signal is above the both tilt values (see
characteristics).
3. Finally, the output signal of the soft limiter will be
clipped by a hard limiter adjustable from 256 to 511.
2.10.6.Chrominance Interpolation
A linear phase interpolator is used to convert the
chrominance sampling rate from 10.125 MHz (4:2:2) to
20.25 MHz (4:4:4). All further processing is carried out
at the full sampling rate.
Fig. 2
–
14:
Characteristic of soft limiter a and b and hard limiter
0
100
200
300
400
500
600
700
800
900
1023
Calculation Example for the
Softlimiter Input Amplitude.
(The real signal processing in
the limiter is 2 bit more than
described here)
Y Input
Black Level
Contrast
Dig. Brightness
BLE
Peaking
16..235 (ITUR)
16 (constant)
63
20
off
off
Limiter input signal:
(Yin-Black Level)
Contr./32 + Brightn.
(235-16)
63/32 + 20 = 451
0
2
4
6
8
10
12
14
slope 2
[0..15]
0
2
4
6
8
10
12
14
Hard limiter
range=
256..511
slope 1
[0..15]
tilt 1 [ 0..511]
tilt 2 [ 0..511]
100
200
300
400
511
Output
0
Part 1
Part 2
Limiter Input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VDP31XXB | Video Processor Family |
| VDP3108PR | Consumer IC |
| VDSGLD_38.88 | TRANS PREBIASED PNP 200MW SOT23 |
| VDSL5100I | TVS 400W 43V UNIDIRECT SMA |
| VDSL5100 | TVS 400W 40V BIDIRECT SMA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VDP3131Y | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Processor Family |
| VDP3132Y | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Processor Family |
| VDP3133Y | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Processor Family |
| VDP3134Y | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Processor Family |
| VDP313XY | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Processor Family |
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