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參數(shù)資料
| 型號： | W25Q32BVZEAG |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 32M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 8 X 6 MM, GREEN, WSON-8 |
| 文件頁數(shù)： | 42/79頁 |
| 文件大?。?/td> | 1090K |
| 代理商： | W25Q32BVZEAG |
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W25Q32BV
Publication Release Date: April 01, 2011
- 47 -
Revision F
7.2.27 Erase / Program Suspend (75h)
The Erase/Program Suspend instruction “75h”, allows the system to interrupt a Sector or Block Erase
operation or a Page Program operation and then read from or program/erase data to, any other sectors or
blocks. The Erase/Program Suspend instruction sequence is shown in Figure 25.
The Write Status Register instruction (01h) and Erase instructions (20h, 52h, D8h, C7h, 60h, 44h) are not
allowed during Erase Suspend. Erase Suspend is valid only during the Sector or Block erase operation. If
written during the Chip Erase operation, the Erase Suspend instruction is ignored. The Write Status
Register instruction (01h) and Program instructions (02h, 32h, 42h) are not allowed during Program
Suspend. Program Suspend is valid only during the Page Program or Quad Page Program operation.
The Erase/Program Suspend instruction “75h” will be accepted by the device only if the SUS bit in the
Status Register equals to 0 and the BUSY bit equals to 1 while a Sector or Block Erase or a Page
Program operation is on-going. If the SUS bit equals to 1 or the BUSY bit equals to 0, the Suspend
instruction will be ignored by the device. A maximum of time of “tSUS” (See AC Characteristics) is required
to suspend the erase or program operation. The BUSY bit in the Status Register will be cleared from 1 to
0 within “tSUS” and the SUS bit in the Status Register will be set from 0 to 1 immediately after
Erase/Program Suspend. For a previously resumed Erase/Program operation, it is also required that the
Suspend instruction “75h” is not issued earlier than a minimum of time of “tSUS” following the preceding
Resume instruction “7Ah”.
Unexpected power off during the Erase/Program suspend state will reset the device and release the
suspend state. SUS bit in the Status Register will also reset to 0. The data within the page, sector or block
that was being suspended may become corrupted. When the device is powered up again, it is
recommended for the user to repeat the same Erase or Program operation that was interrupted, at the
same address location, to avoid the potention data corruption.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (75h)
High Impedance
Mode 0
Mode 3
tSUS
Accept instructions
Figure 25. Erase/Program Suspend Instruction Sequence
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q32BVZEAP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q32BVZEIG | 制造商:Winbond Electronics Corp 功能描述:32MB SPI FLASH |
| W25Q32BVZEIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q32BVZPAG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q32BVZPAP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
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