參數(shù)資料
型號(hào)： W65C134S8Q-8
元件分類(lèi)： 8位微控制器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 3/60頁(yè)
文件大?。?/td> 711K
代理商： W65C134S8Q-8
WESTERN DESIGN CENTER
W65C134S
March 1, 2000
TABLE OF CONTENTS
INTRODUCTION............................................................................................................................................... 1
SECTION 1 W65C134S FUNCTION DESCRIPTION......................................................................................... 2
1.1
1.2
1.3
1.4
The W65C02S Static 8-bit Microprocessor Core....................................................................... 2
4096 x 8 ROM.......................................................................................................................... 2
192 x 8 RAM............................................................................................................................ 2
Bus Control Register................................................................................................................. 2
Table 1-1 BCR7 and BE Control.............................................................................................. 2
Figure 1-1 BE Timing Relative to RESB Input......................................................................... 3
Figure 1-2 Bus Control Register............................................................................................... 3
Chip Select Enable Register ...................................................................................................... 4
Figure 1-3 Chip Select Enable Register..................................................................................... 4
The Timers................................................................................................................................ 4
Figure 1-3 Timer Control Register One..................................................................................... 5
Figure 1-4 Timer Control Register Two ................................................................................... 6
Interrupt Flag Registers............................................................................................................. 7
Interrupt Enable Registers......................................................................................................... 7
Figure 1-5 Interrupt Enable Register One and Interrupt Flag Register One................................. 8
Figure 1-6 Interrupt Enable Register Two and Interrupt Flag Register Two............................... 9
Asynchronous I/O Data Rate Generation.................................................................................. 10
Table 1-2 Timer A Values for Baud Rate Selection.................................................................. 10
Universal Asynchronous Receiver/Transmitter.......................................................................... 11
Figure 1-7 Asynchronous Transmitter Mode with Parity.......................................................... 11
Figure 1-8 Asynchronous Receiver Data Timing...................................................................... 12
Figure 1-9 ACSR Bit Assignments.......................................................................................... 13
The Serial Interface Bus........................................................................................................... 14
Figure 1-10 SIB State Register................................................................................................ 14
Figure 1-11 SR0, SR1, SR2, and SR3 Shift Register................................................................ 15
Figure 1-12 SIB Control and Status Register........................................................................... 16
Figure 1-13 Serial Interface Bus Message Transmission Timing Diagram................................ 19
Figure 1-14 W65C134S Serial Interface Bus Wiring Diagram................................................. 20
Figure 1-15 Bus Address Register............................................................................................ 20
Programming Model, Status Register Coding and Memory Map................................................ 21
Figure 1-16 W65C02S Microprocessor Programming Model................................................... 21
Figure 1-17 W65C02S Status Register Coding........................................................................ 21
Table 1-3 System Memory Map.............................................................................................. 22
Table 1-4 I/O Memory Map.................................................................................................... 23
Table 1-5 Vector Table........................................................................................................... 24
Table 1-6 W65C134S 68 Lead Pin Map.................................................................................. 25
1.5
1.6
1.7
1.8
1.9
1.10
1.11
1.12
SECTION 2 PIN FUNCTION DESCRIPTION
27
Figure 2-1 W65C134S Interface Diagram................................................................................ 27
Figure 2-2 W65C134S 68 Lead Chip Carrier Pinout................................................................ 28
Figure 2-3 W65C134S 80 Lead Quad Flat Pack Pinout........................................................... 29
WEB Write Enable................................................................................................................... 30
RUN and SYNC...................................................................................................................... 30
2.1
2.2
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