
WESTERN DESIGN CENTER
W65C134S
March 1, 2000
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INTRODUCTION
The WDC W65C134S microcomputer is a complete fully static 8-bit computer fabricated on a single chip using
a low power CMOS process. The W65C134S complements an established and growing line of W65C products
and has a wide range of microcomputer applications. The W65C134S has been developed for Hi-Rel
applications, and where minimum power is required.
The W65C134S consists of a W65C02S (Static) Central Processing Unit (CPU), 4096 bytes of Read Only
Memory (ROM), 192 bytes of Random Access Memory (RAM), two 16 bit timers, a low power Serial Interface
Bus (SIB) configured as a token passing Local Area Network, Universal Asynchronous Receiver and
Transmitter (UART) with baud rate timer, one 16-bit "Monitor Watch-Dog Timer" with "restart" interrupt,
twenty-two priority encoded interrupts, ICE Interface, Real-Time clock features, Bus Control Register (BCR)
for external memory bus control, interface circuitry for peripheral devices, and many low power features.
The innovative architecture and the demonstrated high performance of the W65C02S CPU, as well as instruction
simplicity, result in system cost-effectiveness and a wide range of computational power. These features make the
W65C134S a leading candidate for Hi-Rel and other microcomputer applications.
This product description assumes that the reader is familiar with the W65C02S CPU hardware and programming
capabilities. Refer to the W65C02S Data Sheet for additional information.
KEY FEATURES OF THE W65C134S
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CMOS low power process
Operating TA= -40
E
C to +85
E
C
Single 2.8V to 5.5V power supply
Static to 8MHz clock operation
W65C02S compatible CPU
8-bit parallel processing
Variable length stack
True indexing capability
Fifteen addressing modes
Decimal or binary arithmetic
Pipeline architecture
Fully static CPU
W65C816S 16-bit CPU compatible
Single chip microcomputer
Many power saving features
56 CMOS compatible I/O lines
4096 x 8 ROM on chip
192 x 8 RAM on chip
Low power modes
WAIt for interrupt
SToP the clock
Fast oscillator start and stop feature
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Twenty-two priority encoded interrupts
BRK software interrupt
RESET "RESTART" interrupt
NMIB Non-Maskable Interrupt input
SIB Interrupt
IRQ1B level interrupt input
IRQ2B level interrupt input
2 timer edge interrupts
7 positive edge interrupt inputs
5 negative edge interrupt inputs
Asynchronous Receiver Interrupt
Asynchronous Transmitter Interrupt
UART 7/8-bit w/wo odd or even parity
16M byte segmented address space
64K byte linear address space
4 x 16 bit timer/counters
Bus control register for external memory
Internal or external ROM
8 Decoded Chip Select outputs
Surface mount 68 and 80 lead packages
Real time clock features
Third party tools available
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