參數(shù)資料
型號(hào)： W65C134SPL-8
元件分類(lèi)： 8位微控制器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 37/60頁(yè)
文件大?。?/td> 711K
代理商： W65C134SPL-8
WESTERN DESIGN CENTER
W65C134S
March 1, 2000
32
2.6
Reset Input/Output RESB ( RESB)
2.6.1
When RESB is low for 2 or more processor PHI2 cycles all activity on the W65C134S stops and the
chip goes into the static low power state.
2.6.2
After a Reset, all I/O pins become inputs. Because of NOR gates on the inputs, RESB disables all
input buffers. The inputs will not float due to the bus holding devices. Inputs that are unaffected by RESB are BE
and WEB.
2.6.3
When RESB goes from low to high, RUN goes high, the Bus Control Register is initialized to $89 if
BE is low or to $00 if BE is high. The MPU then begins the power-up reset interrupt sequence in which the
program counter is loaded with the reset vector that points to the first instruction to be executed. (See WDC's
W65C02 microprocessor data sheet for more information and instruction timing.)
2.6.4
The reset sequence takes 9 cycles to complete before loading the first instruction opcode.
2.6.5
RESB is a bidirectional pin which is pulled low internally for "restarting" due to a "monitor time out",
Timer M times out causing a system Reset. (See section 1.5, The Timers for more information.)
2.7
Positive Power Supply (VDD)
VDD is the positive power supply and has a range given in Table 3-4.
2.8
Internal Logic Ground (VSS)
VSS is the system logic ground. All voltages are referenced to this supply pin.
2.9
I/O Port Pins ( Pxx)
2.9.1
All ports, except Port 3, which is an output only Port, are bidirectional I/O ports. Each of these
bidirectional Ports has a port data register (PDx) and port data direction register (PDDx). A zero
("0") in PDDxx defines the associated I/O pin as an input with the output transistors in the "off" high
impedance state. A one ("1") in PDDxx defines the I/O pin as an output. A read of PDx always
reads the pin. After reset, all Port pins become input pins with both the data and data direction
registers reset to 0. The inputs will not float due to the bus holding devices.
Port 3 has an associated Chip Select register (PCS3) that is used to enable Chip Selects (CSxB); this
register is defined in Table 1-3 System Memory Map. A "1" in bit x of PCS3 enables Chip Select
CSxB to be output over P3x while a "0" in PCS3x specifies the value in the output data register is to
be output on P3x. Port 3 data register is set to all "1's" after Reset, and PCS3 is cleared to all "0's"
after RESET, except if BCR7=1 then CS7B is enabled.
2.9.2
相關(guān)PDF資料
PDF描述
W65C134SQ-8 8-BIT MICROCONTROLLER
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W65C22S8P-8 Peripheral Interface
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W65C134SQ-8 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8-Bit Microcontroller
W65C21N6TPG-14 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Peripheral Interface Adapter RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
W65C21N6TPLG-14 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Peripheral Interface Adapter RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
W65C21S 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Peripheral Interface Adapter (PIA)
W65C21S6TPG-14 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Peripheral Interface Adapter RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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