參數(shù)資料
型號(hào): W65C134SPL-8
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 44/60頁(yè)
文件大?。?/td> 711K
代理商: W65C134SPL-8
WESTERN DESIGN CENTER
AC Timing Diagram Notes
W65C134S
March 1, 2000
39
3.5
1.tCYC must always be equal to or greater than four times tCYCF when FCLK is running.
2.Rise and Fall Times for all signals are measured on a sample basis from .3xVDD to .7xVDD.
The Rise and Fall times are not programmable on the automated test system that is used for production
testing. A typical Rise and Fall time is 5-10ns; therefore, the spec indicates the duty cycle of the clock as
tested (tPWL=tCYC/2-tF).
The Rise and Fall times indicate output Rise and Fall times.
The most critical Rise and Fall times are for PHI2 because all timing is related to PHI2.
The input Rise and Fall times can affect the input setup time (tIS), output delay time (tOD) and hold time
(tH). This must be taken into account in an application. At 2MHz and 4MHz the worst case input Rise and
Fall times may prevent a system from working.
3.Hold Time for all inputs and outputs is relative to the associated clock edge.
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