參數(shù)資料
型號： W742E811
文件頁數(shù)： 41/66頁
文件大?。?/td> 303K
代理商： W742E811
Preliminary W742C(E)811
Publication Release Date: May 1999
- 41 -
Revision A1
Bit 3 (BUSYO
):
Serial port output busy flag.
5.19 Input Ports RC
Port RC consists of pins RC.0 to RC.3. Each pin of port RC can be connected to a pull-high resistor,
which is controlled by the port mode 0 register (PM0). When the PEF, HEF, and IEF corresponding to
the RC port are set, a signal change at the specified pins of port RC will execute the hold mode release
or interrupt subroutine. Port status register 0 (PSR0) records the status of signal changes on the pins of
port RC. PSR0 can be read out and cleared by the MOVA R, PSR0, and CLR PSR0 instructions. In
addition, the falling edge signal on the pin of port RC specified by the instruction MOV SEF, #I will cause
the device to exit the stop mode. Refer to Figure 5-14 and the instruction table for more details.
Signal
change
PEF.0
D
ck
Q
R
PSR0.0
PSR0.2
D
ck
Q
R
DATA BUS
RC.0
PSR0.3
D
ck
Q
R
PEF.3
Reset
MOV PEF, #I
CLR PSR0
HCF.2
INT 2
Reset
CLR EVF, #I
EVF.2
HEF.2
IEF.2
Falling
Edge
detector
Falling
Edge
Falling
Edge
detector
Falling
detector
SEF.0
SEF.1
SEF.2
SEF.3
To Wake Up Stop Mode
Signal
detector
D
ck
Q
R
PSR0.1
RC.1
PEF.1
Signal
change
detector
D
ck
Q
R
PEF.2
RC.2
Signal
change
detector
RC.3
PM0.2
PM0.2
PM0.2
PM0.2
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