參數(shù)資料
型號(hào): W83C554F
英文描述: W83C554F Highly Integrated System I/O Controller for Power PC TM (South Bridge) & UltraDMA/33 IDE Controller QFP 208
中文描述: W83C554F高度集成的系統(tǒng)的I / O控制器的Power PC商標(biāo)(南橋)
文件頁(yè)數(shù): 9/159頁(yè)
文件大?。?/td> 3991K
代理商: W83C554F
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W83C553F
Power Management Break Event support for Green PC applications
Built-in Integrated Peripheral Controller (IPC) with standard PC-AT peripherals
Two 82C37A DMA controllers (types A, B, and F)
- 32-bit addressing allows use of alternate CPUs, such as PowerPC
- supports multiple 8-bit and 16-bit scatter/gather DMA channels
Two 82C59A interrupt controllers
- all IRQ inputs may be programmed for edge or level sensitivity
One 82C54 counter/timer
Routes external PCI interrupts to a software-selectable interrupt channel
PCI Bus Interface
PCI Revision 2.1 compliant
PCI clock frequencies up to 33 MHz at 5V
Supports delayed completion for ISA cycles
Active address decoding for internal I/O devices
Subtractive decoding for ISA bridge, KBC and RTC
Supports disconnection (with retry) for slow internal accesses to improve latency
Short PCI bus ownership when mastering to minimize overall system latency
Fast DMA transfers from I/O devices to PCI agents as a master
Separate request and grant signals for ISA DMA and IDE controllers
ISA Bus Bridge
Full implementation of a standard ISA bus
Separate ISA and IDE data buses reduce noise and increase system performance
Synchronous PCI-to-ISA interface with direct drive for 5 ISA slots
XD-Bus interface
Support for BIOS ROM or PowerPC systems boot ROM
Support for flash EPROM
Provides keyboard controller connections
Provides real-time clock connections
Provides data buffer control
Miscellaneous
Port B support
Port 92 support
Uses 0.6
um
, ultra-low power CMOS technology
for Rev. E and below; 0.5um for Rev. G.
Packaged in a 208-pin PQFP package
General Information
WINBOND SYSTEMS LABORATORY
6
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