參數(shù)資料
型號(hào): W9864G6DB-7
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 1M x 4 BANKS x 16 BITS SDRAM
中文描述: 4M X 16 SYNCHRONOUS DRAM, 5.5 ns, PBGA60
封裝: 0.65 MM PITCH, BGA-60
文件頁(yè)數(shù): 3/48頁(yè)
文件大小: 1283K
代理商: W9864G6DB-7
W986432DH
Publication Release Date: September 4, 2001
- 3 -
Revision A3
1. GENERAL DESCRIPTION
W986432DH is a high-speed synchronous dynamic random access memory (SDRAM), organized as
512K words
×
4 banks
×
32 bits. Using pipelined architecture and 0.175
μ
m process technology,
W986432DH delivers a data bandwidth of up to 800M bytes per second (-5). For different application,
W986432DH is sorted into the following speed grades: -5, -6, -7. The -5 parts can run up to 200 MHz
/CL3. The -6 parts can run up to 166 MHz/CL3. The -7 parts can run up to 143 MHz/CL3. For handheld
device application, we also provide low power option, the grade of -7L, with Self Refresh Current under
400
μ
A and work well at 2.7V during Self Refresh Mode. For special application, we provide extended
temperature option the grade of –6I can work well in wide temperature from -25
°
C to 85
°
C.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be
accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command. Column addresses are automatically generated by the SDRAM internal counter in burst
operation. Random column read is also possible by providing its address at each clock cycle. The
multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W986432DH is ideal for main memory in
high performance applications.
2. FEATURES
3.3V
±
0.3V power supply
524288 words
×
4 banks
×
32 bits organization
Self Refresh Current: Standard and Low Power
CAS latency: 2 and 3
Burst Length: 1, 2, 4, 8, and full page
Sequential and Interleave burst
Burst read, single write operation
Byte data controlled by DQM
Power Down Mode
Auto pre-charge and controlled pre-charge
4K refresh cycles/64 mS
Interface: LVTTL
Packaged in 86-pin TSOP II, 400 mil - 0.50
3. AVAILABLE PART NUMBER
PART NUMBER
SPEED (CL = 3)
SELF REFRESH
CURRENT (MAX.)
OPERATING
TEMPERATURE
W986432DH-5
200 MHz
1 mA
0
°
C
70
°
C
W986432DH-6
166 MHz
1 mA
0
°
C
70
°
C
W986432DH-6I
166 MHz
400
μ
A
-25
°
C
85
°
C
W986432DH-7
143 MHz
1 mA
0
°
C
70
°
C
W986432DH-7L
143 MHz
400
μ
A
0
°
C
70
°
C
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