參數(shù)資料
型號(hào): WEDPNF8M721V-1210BC
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類(lèi): 存儲(chǔ)器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA275
封裝: 32 X 25 MM, PLASTIC, BGA-275
文件頁(yè)數(shù): 1/42頁(yè)
文件大?。?/td> 1297K
代理商: WEDPNF8M721V-1210BC
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WEDPNF8M721V-XBX
June 2003 Rev. 4
8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module
Multi-Chip Package
FEATURES
n Package:
275 Plastic Ball Grid Array (PBGA), 32mm x 25mm
n Commercial, Industrial and Military Temperature Ranges
n Weight:
WEDPNF8M721V-XBX - 2.5 grams typical
SDRAM PERFORMANCE FEATURES
n Organized as 8M x 72
n High Frequency = 100, 125MHz
n Single 3.3V ±0.3V power supply
n Fully Synchronous; all signals registered on positive
edge of system clock cycle
n Internal pipelined operation; column address can be
changed every clock cycle
n Internal banks for hiding row access/precharge
n Programmable Burst length 1,2,4,8 or full page
n 4096 refresh cycles
FLASH PERFORMANCE FEATURES
n User Configurable as 1Mx8 or 512Kx16
n Access Times of 100, 120, 150ns
n 3.3 Volt for Read and Write Operations
n 1,000,000 Erase/Program Cycles
n Sector Architecture
One 16KByte, two 8KBytes, one 32KByte, and fif
teen 64KBytes in byte mode
One 8K word, two 4K words, one 16K word, and
fifteen 32K word sectors in word mode.
Any combination of sectors can be concurrently
erased. Also suppor ts full chip erase
n Boot Code Sector Architecture (Bottom)
n Embedded Erase and Program Algorithms
n Erase Suspend/Resume
Suppor ts reading data from or programing data to a
sector not being erased
BENEFITS
n 42% SPACE SAVINGS
n Reduced part count
n Reduced I/O count
14% I/O Reduction
n Suitable for hi-reliability applications
n SDRAM Upgradeable to 16M x 72 density (contact
factory for information)
n Flash upgradeable to 2M x 8 (or 1M x 16 or 512K x 32)
density
* This data sheet describes a product that may or may not be under
development and is subject to change or cancellation without notice.
ADVANCED*
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