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參數(shù)資料
| 型號： | WEDPNF8M721V-1210BC |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA275 |
| 封裝： | 32 X 25 MM, PLASTIC, BGA-275 |
| 文件頁數(shù)： | 21/42頁 |
| 文件大?。?/td> | 1297K |
| 代理商： | WEDPNF8M721V-1210BC |
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White Electronic Designs Corporation Phoenix AZ (602) 437-1520
White Electronic Designs
WEDPNF8M721V-XBX
NOTES:
1. FD5 switches to "1" when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See "FD5: Exceed Timing Limits" for more
information.
2. FD7 and FD2 require valid address when reading status information. Refer to the appropriate subsection for further details.
TABLE 8 - WRITE OPERATION STATUS
Status
FD7(2)
FD6
FD5(1)
FD3
FD2(2)
RY/BY1
Embedded Program Algorithm
FD7
Toggle
0
N/A
No Toggle
0
Embedded Erase Algorithm
0
Toggle
0
1
Toggle
0
Reading within Erase Suspended Sector
1
No Toggle
0
N/A
Toggle
1
Reading within Non-Erase Suspended Sector
Data
1
Erase Suspended Program
FD7
Toggle
0
N/A
0
Standard
Mode
Erase
Suspend
Mode
FLASH AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED
(VCC = 3.3V, VSS = 0V, TA = -55°C TO +125°C)
Parameter
Symbol
-100
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tWC
100
120
150
ns
Write Enable Setup Time
tWLEL
tWS
00
0
ns
Chip Select Pulse Width
tELEH
tCP
45
50
ns
Address Setup Time
tAVEL
tAS
00
0
ns
Data Setup Time
tDVEH
tDS
45
50
ns
Data Hold Time
tEHDX
tDH
00
0
ns
Address Hold Time
tELAX
tAH
45
50
ns
Chip Select Pulse Width High
tEHEL
tCPH
20
ns
Duration of Byte Programming Operation (1)
t WHWH1
300
s
Sector Erase Time
t WHWH2
15
sec
Read Recovery Time (2)
tGHEL
00
0
s
Chip Programming Time
50
sec
1. Typical value for tWHWH1 is 9s.
2. Guaranteed by design, but not tested.
will accept additional sector erase commands. To ensure the
command has been accepted, the system software should
check the status of FD3 prior to and following each subse-
quent sector erase command. If FD3 is high on the second
status check, the last command may not have been accepted.
Table 8 shows the outputs for FD3.
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| WEDPNF8M721V-1210BI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1210BM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1212BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1212BI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
| WEDPNF8M721V-1212BM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip Package |
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