參數(shù)資料
型號(hào): XCCACE-TQG144I
廠商: Xilinx Inc
文件頁(yè)數(shù): 37/69頁(yè)
文件大?。?/td> 0K
描述: IC ACE CONTROLLER CHIP TQ144
產(chǎn)品變化通告: XCCACE-TQG144I Discontinuation 31/Oct/2011
標(biāo)準(zhǔn)包裝: 60
控制器類型: ACE 控制器
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 30mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
包裝: 管件
其它名稱: 122-1511-5
System ACE CompactFlash Solution
42
DS080 (v3.0) April 7, 2014
Product Specification
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Once the CompactFlash device is ready to receive a new
command, the following information needs to be written to
the MPU interface:
1.
The sector address or logical block address (LBA) of
the first sector to be transferred should be written to the
following MPU address locations:
-
LBA[7:0] @ MPU byte address 10h
-
LBA[15:8] @ MPU byte address 11h
-
LBA[23:16] @ MPU byte address 12h
-
LBA[27:24] @ MPU byte address 13h (note that
only four bits are used in the most significant LBA
byte)
2.
The number of sectors to be read should be written to
the low byte of the SECCNTCMDREG register (MPU
byte address 14h)
3.
The ReadMemCardData command (03h) should be
written to the high byte of the SECCNTCMDREG
register (MPU byte address 15h)
4.
Reset the CFGJTAG controller by setting the
CFGRESET bit (bit 7) of the CONTROLREG register
(MPU address 18h) to a 1.
Immediately after writing the command to the MPU inter-
face, the CFGJTAG controller should be reset before read-
ing the sector data from the data buffer.
The control flow process for reading the sector data from
the data buffer is shown in Figure 25, page 45.
After all of the requested sector data has been read, the
CFGJTAG controller should be taken out of reset and the
CompactFlash lock should be released by setting the
LOCKREQ bit (bit 1) and CFGRESET bit (bit 7) of the low
byte of the CONTROLREG register (MPU byte address
18h) to a 0. Note that all requested sector data should be
read from the data buffer in order to avoid a deadlock situa-
tion with the CompactFlash device.
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