參數資料
型號: XCCACE-TQG144I
廠商: Xilinx Inc
文件頁數: 69/69頁
文件大小: 0K
描述: IC ACE CONTROLLER CHIP TQ144
產品變化通告: XCCACE-TQG144I Discontinuation 31/Oct/2011
標準包裝: 60
控制器類型: ACE 控制器
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 30mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應商設備封裝: 144-TQFP(20x20)
包裝: 管件
其它名稱: 122-1511-5
System ACE CompactFlash Solution
DS080 (v3.0) April 7, 2014
Product Specification
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
System ACE CF Directory Structure
A basic understanding of the typical System ACE CF file
and directory structure (shown in Figure 8) is useful when
programming an FPGA target system with a CompactFlash
device in the System ACE solution.
The ACE file is at the lowest level of the directory structure.
The Xilinx iMPACT software converts a revision of a design
(bitstream) into an ACE file. An ACE file represents a single
set of bitstreams for a particular chain of devices.
The next level up in the file structure is a collection. The col-
lection consists of eight ACE files grouped together. All of
the ACE files in a collection (directory) can be addressed
when in the System ACE CF environment. There can be
several collections stored on a CompactFlash device, but
only one collection can be active at any given time.
The
xilinx.sys
file determines the collection from
which designs can be read.
The hierarchical design of the System ACE CF directory
structure provides the ability to maintain multiple revisions
or collections of different designs in a single CompactFlash
device. Each collection directory can contain one or more
designs that reside in different subdirectories. Each design
subdirectory should contain a single ACE file that repre-
sents a single set of bitstreams for a particular chain of
devices. In addition to FPGA configuration information, the
collection and design subdirectories can contain other infor-
mation pertaining to the system design such as system soft-
ware, documentation, etc.
The xilinx.sys file in the root directory of the Compact-
Flash device is used to control which of the designs within
the active collection is to be used to configure the chain of
target devices. Only one collection, containing up to eight
designs, can be active at one time.
The System ACE CF controller parses the xilinx.sys
file to determine the active collection designs and uses the
three configuration address pins or MPU register bits
(CFGADDR)
to
select
the
desired
design.
If
no
xilinx.sys
file exists in the root directory of the Com-
pactFlash device, a single ACE file in the root directory is
used by System ACE as the active design.
Figure 8: System ACE Directory Structure
DS080_11_032101
dir = Rev_3;
cfgaddr0 = asia;
cfgaddr1 = europe;
cfgaddr3 = samerica;
cfgaddr4 = diag_1;
cfgaddr5 = diag_1;
cfgaddr6 = diag_2;
cfgaddr7 = diag_2;
xilinx.sys
Project Name - (root dir) "/"
*.ace
asia
(sub-dir)
europe
(sub-dir)
diag_2
(sub-dir)
Rev_3 (sub-dir)
Rev_2 (sub-dir)
Rev_1 (sub-dir)
CompactFlash
Available Collections
Collection Rev_3 Available Designs
for Target FPGA Chain
ACE System File
Containing Active Collection
(Up to 8 Designs)
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