參數(shù)資料
型號(hào): XR17D158IV
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
中文描述: 8 CHANNEL(S), 6.25M bps, SERIAL COMM CONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, TQFP-144
文件頁數(shù): 15/72頁
文件大?。?/td> 1520K
代理商: XR17D158IV
xr
REV. 1.2.1
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
XR17D158
15
0x800 - 0x80F
UART channel 4 Regs (
Table 12
&
Table 13
)
8/16/24/32
First 8 regs are 16550 compatible
0x810 - 0x8FF
Reserved
0x900 - 0x93F
UART 4 – Read FIFO
Read-Only
8/16/24/32
64 bytes of RX FIFO data
0x900 - 0x93F
UART 4 – Write FIFO
Write-Only
8/16/24/32
64 bytes of TX FIFO data
0x940 - 0x97F
Reserved
0x980 - 0x9FF
UART 4 – Read FIFO
with errors
Read-Only
16/32
64 bytes of RX FIFO data + LSR
0xA00 - 0xA0F
UART channel 5 Regs (
Table 12
&
Table 13
)
8/16/24/32
First 8 regs are 16550 compatible
0xA10 - 0xAFF
Reserved
ite
0xB00 - 0xB3F
UART 5 – Read FIFO
Read-Only
8/16/24/32
64 bytes of RX FIFO data
0xB00 - 0xB3F
UART 5 – Write FIFO
Write-Only
8/16/24/32
64 bytes of TX FIFO data
0xB40 - 0xB7F
Reserved
0xB80 - 0xBFF
UART 5 – Read FIFO
with errors
Read-Only
16/32
64 bytes of RX FIFO data + LSR
0xC00 - 0xC0F
UART channel 6 Regs (
Table 12
&
Table 13
)
8/16/24/32
First 8 regs are 16550 compatible
0xC10 - 0xCFF
Reserved
0xD00 - 0xD3F
UART 6 – Read FIFO
Read-Only
8/16/24/32
64 bytes of RX FIFO data
0xD00 - 0xD3F
UART 6 – Write FIFO
Write-Only
8/16/24/32
64 bytes of TX FIFO data
0xD40 - 0xD7F
Reserved
0xD80 - 0xDFF
UART 6 – Read FIFO
with errors
Read-Only
16/32
64 bytes of RX FIFO data + LSR
0xE00 - 0xE0F
UART channel 7 Regs (
Table 12
&
Table 13
)
8/16/24/32
First 8 regs are 16550 compatible
0xE10 - 0xEFF
Reserved
0xF00 - 0xF3F
UART 7 – Read FIFO
Read-Only
8/16/24/32
64 bytes of RX FIFO data
0xF00 - 0xF3F
UART 7 – Write FIFO
Write-Only
8/16/24/32
64 bytes of TX FIFO data
0xF40 - 0xF7F
Reserved
0xF80 - 0xFFF
UART 7 – Read FIFO
with errors
Read-Only
16/32
64 bytes of RX FIFO data + LSR
T
ABLE
3: XR17D158 D
EVICE
C
ONFIGURATION
R
EGISTERS
O
FFSET
A
DDRESS
M
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S
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/W
RITE
D
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W
IDTH
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