參數(shù)資料
型號: XR17L152
廠商: Exar Corporation
英文描述: 3.3V PCI BUS DUAL UART
中文描述: 3.3V的PCI總線雙UART
文件頁數(shù): 10/55頁
文件大小: 318K
代理商: XR17L152
á
DISCONTINUED
XR17L152
3.3V PCI BUS DUAL UART
REV. 1.1.0
10
0x200 - 0x20F
UART channel 1 Regs
(
Table 10
&
Table 11
)
8/16/24/32
First 8 regs are 16550 compatible
0x210 - 0x2FF
Reserved
Read/Write
0x300
UART 1 – Read FIFO
Read-Only
8/16/24/32
64 bytes of RX FIFO data
0x300
UART 1 – Write FIFO
Write-Only
8/16/24/32
64 bytes of TX FIFO data
0x340 - 0x37F
Reserved
0x380 - 0x3FF
UART 1 – Read FIFO
with status
Read-Only
16/32
64 bytes of RX FIFO data + LSR
T
ABLE
3: D
EVICE
C
ONFIGURATION
R
EGISTERS
SHOWN
IN
BYTE
ALIGNMENT
A
DDRESS
[A7:A0]
R
EGISTER
R
EAD
/W
RITE
C
OMMENT
R
ESET
S
TATE
Ox080
INT0 [7:0]
Read-only Interrupt [1:0], Reserved [7:2]
Bits 7-0 = 0x00
Ox081
INT1 [15:8]
Read-only [5:0], Reserved [7:6]
Bits 7-0 = 0x00
Ox082
INT2 [23:16]
Reserved [7:0]
Bits 7-0 = 0x00
Ox083
INT3 [31:24]
Reserved [7:0]
Bits 7-0 = 0x00
Ox084
TIMERCNTL
Read/Write Timer Control
Bits 7-0 = 0x00
Ox085
TIMER
Reserved
Bits 7-0 = 0x00
Ox086
TIMERLSB
Read/Write Timer LSB
Bits 7-0 = 0x00
Ox087
TIMERMSB
Read/Write Timer MSB
Bits 7-0 = 0x00
Ox088
8XMODE
Read/Write
Bits 7-0 = 0x00
Ox089
REGA
Reserved
Bits 7-0 = 0x00
Ox08A
RESET
Write-only Self clear bits after executing Reset [3:0]
Bits 7-0 = 0x00
Ox08B
SLEEP
Read/Write Sleep mode [3:0]
Bits 7-0 = 0x00
Ox08C
DREV
Read-only Device revision
Bits 7-0 = 0x01
Ox08D
DVID
Read-only Device identification
Bits 7-0 = 0x22
Ox08E
REGB
Read/Write
Bits 7-0 = 0x00
Ox08F
MPIOINT
Read/Write MPIO interrupt mask
Bits 7-0 = 0x00
Ox090
MPIOLVL
Read/Write MPIO level control
Bits 7-0 = 0x00
T
ABLE
2: XR17L152 D
EVICE
C
ONFIGURATION
R
EGISTERS
O
FFSET
A
DDRESS
M
EMORY
S
PACE
R
EAD
/W
RITE
D
ATA
W
IDTH
C
OMMENT
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