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參數(shù)資料
| 型號： | XRT73LC00AIV |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 39/61頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU STS1/DS3/E3 SGL 44TQFP |
| 標準包裝： | 160 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
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XRT73LC00A
41
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
It is useful to disable the DLOS Detector in the XRT73LC00A for debugging purposes. If the XRT73LC00A is
operating in the HOST Mode, the DLOS Detector can be disabled by writing a “1” into the DLOSDIS bit-field in
Command Register 2.
NOTE: Setting both the ALOSDIS and DLOSDIS bit-fields to a “1” disables LOS Declaration in the XRT73LC00A.
3.6.3
Muting the Recovered Data while the LOS is being Declared
In some applications it is not desirable for the XRT73LC00A E3/DS3/STS-1 LIU to recover data and route it to
the Receiving Terminal while the LIU is declaring a LOS condition. The LOS Muting feature, if enabled, causes
the XRT73LC00A to halt transmission of the recovered data to the Receiving Terminal while the LOS condition
is True. In this case, the RPOS and RNEG output pins are forced to “0”. Once the LOS condition has been
cleared, the XRT73LC00A resumes the transmission of the recovered data to the Receiving Terminal. The
XRT73LC00A allows enabling of the Muting Upon LOS feature by either of the following means.
If the XRT73LC00A is Operating in the Hardware Mode:
The Muting Upon LOS feature is enabled by pulling the LOSMUTEN input pin (pin 19) to VDD.
If the XRT73LC00A is Operating in the HOST Mode:
To enable this feature, access the Microprocessor Serial Interface and write a “1” into the LOSMUT bit-field in
Command Register 3.
NOTE: The XRT73LC00A automatically declares an LOS Condition any time it has been configured to operate in either the
Analog Local Loop-Back or Digital Local Loop-Back Modes.
Muting -upon -LOS must be disabled
prior to
configuring the device to operate in either of these local Loop-Back modes.
3.7
Routing the Recovered Timing and Data Information to the Receiving Terminal Equipment
The XRT73LC00A ultimately takes the Recovered Timing and Data information, converts it into CMOS levels
and routes it to the Receiving Terminal Equipment via the RPOS, RNEG, RCLK1 and RCLK2 output pins.
The XRT73LC00A can deliver the recovered data and clock information to the Receiving Terminal in either a
Single-Rail or Dual-Rail format.
Routing Dual-Rail Format Data to the Receiving Terminal Equipment
Whenever the XRT73LC00A delivers Dual-Rail format to the Terminal Equipment it does so via the following
output signals.
n
RPOS
n
RNEG
n
RCLK1
n
RCLK2
Figure 24 illustrates the typical interface for the transmission of data in a Dual-Rail Format from the Receive
Section of the XRT73LC00A to the Receiving Terminal Equipment.
COMMAND REGISTER CR2 (ADDRESS = 0X02)
D4
D3
D2
D1
D0
Reserved ENDECDIS ALOSDIS DLOSDIS REQDIS
X
1
X
COMMAND REGISTER CR3 (ADDRESS = 0X03)
D4
D3
D2
D1
D0
RNRZ
LOSMUT
CLK2DIS RCLK2INV CLK1INV
X
1
X
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參數(shù)描述 |
|---|---|
| XRT73LC00AIV-F | 功能描述:外圍驅(qū)動器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73LC00AIVTR | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00AIVTR-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
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