參數(shù)資料
型號(hào)： XRT75L00D
廠商： Exar Corporation
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述： E3/DS3/STS-1線路接口單元與SONET DESYNCHRONIZER
文件頁數(shù)： 35/92頁
文件大?。?/td> 894K
代理商： XRT75L00D
XRT75L00D
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
30
The decoder block takes the output from clock and data recovery block and decodes the B3ZS (for DS3 or
STS-1) or HDB3 (for E3) encoded line signal and detects any coding errors or excessive zeros in the data
stream.
Whenever the input signal violates the B3ZS or HDB3 coding sequence for bipolar violation or contains three
(for B3ZS) or four (for HDB3) or more consecutive zeros, an active “High” pulse is generated on the RLCV
output pins to indicate line code violation.
N
OTE
: In Single- Rail (NRZ) mode, the decoder is bypassed.
5.4
LOS (Loss of Signal) Detector:
5.4.1
DS3/STS-1 LOS Condition:
A Digital Loss of Signal (DLOS) condition occurs when a string of 175 ± 75 consecutive zeros occur on the line.
When the DLOS condition occurs, the DLOS bit is set to “1” in the status control register. DLOS condition is
cleared when the detected average pulse density is greater than 33% for 175 ± 75 pulses.
Analog Loss of Signal (ALOS) condition occurs when the amplitude of the incoming line signal is below the
threshold as shown in the Table 10.The status of the ALOS condition is reflected in the ALOS status control
register.
RLOS is the logical OR of the DLOS and ALOS states. When the RLOS condition occurs the RLOS output pin
is toggled “High” and the RLOS bit is set to “1” in the status control register.
D
ISABLING
ALOS/DLOS D
ETECTOR
:
For debugging purposes it is useful to disable the ALOS/DLOS detector. Writing a “1” to the ALOS and DLOS
bits disables the LOS detector on a per channel basis.
5.4.2
E3 LOS Condition:
If the level of incoming line signal drops below the threshold as described in the ITU-T G.775 standard, the
LOS condition is detected. Loss of signal level is defined to be between 15 and 35 dB below the normal level.
If the signal drops below 35 dB for 175 ± 75 consecutive pulse periods, LOS condition is declared. This is
illustrated in Figure 19.
T
ABLE
10: T
HE
ALOS (A
NALOG
LOS) D
ECLARATION
AND
C
LEARANCE
T
HRESHOLDS
FOR
A
GIVEN
SETTING
OF
REQEN (DS3
AND
STS-1 A
PPLICATIONS
)
A
PPLICATION
REQEN S
ETTING
S
IGNAL
L
EVEL
TO
D
ECLARE
ALOS
S
IGNAL
L
EVEL
TO
C
LEAR
ALOS
DS3
1
<20mV
>90mV
STS-1
1
<25mV
>115mV
相關(guān)PDF資料
PDF描述
XRT75L00DIV E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L02 TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L02IV TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L03D THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04D FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75L00DES 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 LIU+DESYNCH 3.3V LIU+DESYNCH 3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00DIV 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L00DIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L00DIVTR 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00DIVTR-F 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
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