XRT75L03D
REV. 1.0.0
á
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
I
GENERAL DESCRIPTION ............................................................................................... 1
F
EATURES
.................................................................................................................................................... 1
A
PPLICATIONS
.............................................................................................................................................. 1
T
RANSMIT
I
NTERFACE
C
HARACTERISTICS
...................................................................................................... 2
R
ECEIVE
I
NTERFACE
C
HARACTERISTICS
........................................................................................................ 2
Figure 1. Block Diagram of the XRT 75L03D .................................................................................................... 2
Figure 2. Pin Out of the XRT75L03D ................................................................................................................ 3
ORDERING INFORMATION ................................................................................................................... 3
PIN DESCRIPTIONS (BY FUNCTION) ............................................................................. 4
S
YSTEM
-S
IDE
T
RANSMIT
I
NPUT
AND
T
RANSMIT
C
ONTROL
P
INS
...................................................................... 4
T
RANSMIT
L
INE
S
IDE
P
INS
............................................................................................................................ 8
S
YSTEM
-S
IDE
R
ECEIVE
O
UTPUT
AND
R
ECEIVE
C
ONTROL
P
INS
.................................................................... 10
R
ECEIVE
L
INE
S
IDE
P
INS
............................................................................................................................ 17
C
LOCK
I
NTERFACE
...................................................................................................................................... 18
G
ENERAL
C
ONTROL
P
INS
........................................................................................................................... 19
C
ONTROL
AND
A
LARM
I
NTERFACE
............................................................................................................... 21
J
ITTER
A
TTENUATOR
INTERFACE
................................................................................................................. 21
P
OWER
S
UPPLY
AND
G
ROUND
P
INS
............................................................................................................ 24
XRT75L03D P
IN
L
ISTING
IN
N
UMERICAL
O
RDER
......................................................................................... 26
1.0 ELECTRICAL CHARACTERISTICS ................................................................................................. 31
T
ABLE
1: A
BSOLUTE
M
AXIMUM
R
ATINGS
............................................................................................................ 31
T
ABLE
2: DC E
LECTRICAL
C
HARACTERISTICS
: ................................................................................................... 31
2.0 TIMING CHARACTERISTICS ............................................................................................................ 32
Figure 3. Typical interface between terminal equipment and the XRT75L03D (dual-rail data) ....................... 32
Figure 4. Transmitter Terminal Input Timing ................................................................................................... 32
Figure 5. Receiver Data output and code violation timing .............................................................................. 33
Figure 6. Transmit Pulse Amplitude test circuit for E3, DS3 and STS-1 Rates ............................................... 33
3.0 LINE SIDE CHARACTERISTICS: ..................................................................................................... 34
3.1 E3
LINE
SIDE
PARAMETERS
: ............................................................................................................................. 34
Figure 7. Pulse Mask for E3 (34.368 mbits/s) interface as per itu-t G.703 ..................................................... 34
T
ABLE
3: E3 T
RANSMITTER
LINE
SIDE
OUTPUT
AND
RECEIVER
LINE
SIDE
INPUT
SPECIFICATIONS
........................... 35
Figure 8. Bellcore GR-253 CORE Transmit Output Pulse Template for SONET STS-1 Applications ............ 36
T
ABLE
4: STS-1 P
ULSE
M
ASK
E
QUATIONS
........................................................................................................ 36
T
ABLE
5: STS-1 T
RANSMITTER
L
INE
S
IDE
O
UTPUT
AND
R
ECEIVER
L
INE
S
IDE
I
NPUT
S
PECIFICATIONS
(GR-253) . 37
Figure 9. Transmit Ouput Pulse Template for DS3 as per Bellcore GR-499 .................................................. 38
T
ABLE
6: DS3 P
ULSE
M
ASK
E
QUATIONS
........................................................................................................... 38
T
ABLE
7: DS3 T
RANSMITTER
L
INE
S
IDE
O
UTPUT
AND
R
ECEIVER
L
INE
S
IDE
I
NPUT
S
PECIFICATIONS
(GR-499) ..... 39
Figure 10. Microprocessor Serial Interface Structure ...................................................................................... 39
Figure 11. Timing Diagram for the Microprocessor Serial Interface ................................................................ 40
T
ABLE
8: M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
T
IMINGS
( TA = 250C, VDD=3.3V± 5%
AND
LOAD
= 10
P
F) ..... 40
FUNCTIONAL DESCRIPTION: ........................................................................................ 41
4.0 The Transmitter Section: ................................................................................................................. 41
Figure 12. Single-Rail or NRZ Data Format (Encoder and Decoder are Enabled) ......................................... 41
Figure 13. Dual-Rail Data Format (encoder and decoder are disabled) ......................................................... 41
4.1 T
RANSMIT
C
LOCK
: ........................................................................................................................................... 42
4.2 B3ZS/HDB3 E
NCODER
: .................................................................................................................................. 42
4.2.1 B3ZS Encoding: ................................................................................................................................. 42
4.2.2 HDB3 Encoding: ................................................................................................................................. 42
Figure 14. B3ZS Encoding Format ................................................................................................................. 42
Figure 15. HDB3 Encoding Format ................................................................................................................. 42
4.3 T
RANSMIT
P
ULSE
S
HAPER
: .............................................................................................................................. 43
4.3.1 Guidelines for using Transmit Build Out Circuit: ............................................................................ 43
4.3.2 Interfacing to the line: ........................................................................................................................ 43
4.4 T
RANSMIT
D
RIVE
M
ONITOR
: ............................................................................................................................. 44
4.5 T
RANSMITTER
S
ECTION
O
N
/O
FF
: ...................................................................................................................... 44
5.0 The Receiver Section: ...................................................................................................................... 44