參數(shù)資料
型號： XRT75L03D
廠商： Exar Corporation
英文描述： THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述： Three頻道E3/DS3/STS-1線路接口單元與SONET DESYNCHRONIZER
文件頁數(shù)： 78/134頁
文件大?。?/td> 659K
代理商： XRT75L03D
XRT75L03D
REV. 1.0.0
á
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
73
3
FL Alarm Declared
R/O
0
FL (FIFO Limit) Alarm Declared:
This READ-ONLY bit-field indicates whether or not the Jit-
ter Attenuator block (within Channel_n) is currently declar-
ing the FIFO Limit Alarm.
The Jitter Attenuator block will declare the FIFO Limit
Alarm anytime the Jitter Attenuator FIFO comes within two
bit-periods of either overflowing or under-running.
Conversely, the Jitter Attenuator block will clear the FIFO
Limit Alarm anytime the Jitter Attenuator FIFO is NO
longer within two bit-periods of either overflowing or under-
running.
Typically, this Alarm will only be declared whenever there is
a very serious problem with timing or jitter in the system.
0 - Indicates that the Jitter Attenuator block (within
Channel_n) is NOT currently declaring the FIFO Limit
Alarm condition.
1 - Indicates that the Jitter Attenuator block (within
Channel_n) is currently declaring the FIFO Limit Alarm
condition.
N
OTE
:
This bit-field is only active if the Jitter Attenuator
(within Channel_n) has been enabled.
2
Receive LOL Con-
dition Declared
R/O
0
Receive LOL (Loss of Lock) Condition Declared:
This READ-ONLY bit-field indicates whether or not the
Receive Section (within Channel_n) is currently declaring
the LOL (Loss of Lock) condition.
The Receive Section (of Channel_n) will declare the LOL
Condition, if any one of the following conditions are met.
If the frequency of the Recovered Clock signal differs
from that of the signal provided to the E3CLK input (for
E3 applications), the DS3CLK input (for DS3
applications) or the STS-1CLK input (for STS-1
applications) by 0.5% (or 5000ppm) or more.
If the frequency of the Recovered Clock signal differs
from the line-rate clock signal (for Channel_n) that has
been generated by the SFM Clock Synthesizer PLL (for
SFM Mode Operation) by 0.5% (or 5000ppm) or more.
0 - Indicates that the Receive Section of Channel_n is NOT
currently declaring the LOL Condition.
1 - Indicates that the Receive Section of Channel_n is cur-
rently declaring the LOL Condition.
B
IT
N
UMBER
N
AME
T
YPE
D
EFAULT
V
ALUE
D
ESCRIPTION
相關(guān)PDF資料
PDF描述
XRT75L04D FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04DIV FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04 FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L04IV FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L06D SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75L03DES 功能描述:時鐘合成器/抖動清除器 3 CH T3/E3/STS1 LIU+DESYNCH3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L03DIV 功能描述:外圍驅(qū)動器與原件 - PCI 3CHNNEL E3/DS3/STS 1 SONET DE-SYNCH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L03DIV-F 功能描述:外圍驅(qū)動器與原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L03DIVTR 功能描述:時鐘合成器/抖動清除器 3CHNNEL E3/DS3/STS 1 SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L03DIVTR-F 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
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