參數(shù)資料
型號： XRT75L03D
廠商： Exar Corporation
英文描述： THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述： Three頻道E3/DS3/STS-1線路接口單元與SONET DESYNCHRONIZER
文件頁數(shù)： 7/134頁
文件大?。?/td> 659K
代理商： XRT75L03D
á
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L03D
REV. 1.0.0
IV
9.5 A R
EVIEW
OF
THE
C
ATEGORY
I I
NTRINSIC
J
ITTER
R
EQUIREMENTS
(
PER
T
ELCORDIA
GR-253-CORE)
FOR
DS3
AP
-
PLICATIONS
........................................................................................................................................................................ 110
T
ABLE
31: S
UMMARY
OF
"C
ATEGORY
I I
NTRINSIC
J
ITTER
R
EQUIREMENT
PER
T
ELCORDIA
GR-253-CORE,
FOR
DS3
APPLICATIONS
.................................................................................................................................. 110
9.5.1 DS3 De-Mapping Jitter ..................................................................................................................... 111
9.5.2 Single Pointer Adjustment .............................................................................................................. 111
Figure 48. Illustration of Single Pointer Adjustment Scenario ...................................................................... 111
9.5.3 Pointer Burst .................................................................................................................................... 112
9.5.4 Phase Transients ............................................................................................................................. 112
Figure 49. Illustration of Burst of Pointer Adjustment Scenario .................................................................... 112
Figure 50. Illustration of "Phase-Transient" Pointer Adjustment Scenario ................................................... 112
9.5.5 87-3 Pattern ...................................................................................................................................... 113
9.5.6 87-3 Add ............................................................................................................................................ 113
Figure 51. An Illustration of the 87-3 Continuous Pointer Adjustment Pattern ............................................. 113
9.5.7 87-3 Cancel ....................................................................................................................................... 114
Figure 52. Illustration of the 87-3 Add Pointer Adjustment Pattern .............................................................. 114
Figure 53. Illustration of 87-3 Cancel Pointer Adjustment Scenario ............................................................. 114
9.5.8 Continuous Pattern .......................................................................................................................... 115
9.5.9 Continuous Add .............................................................................................................................. 115
Figure 54. Illustration of Continuous Periodic Pointer Adjustment Scenario ............................................... 115
9.5.10 Continuous Cancel ........................................................................................................................ 116
Figure 55. Illustration of Continuous-Add Pointer Adjustment Scenario ....................................................... 116
Figure 56. Illustration of Continuous-Cancel Pointer Adjustment Scenario .................................................. 116
9.6 A R
EVIEW
OF
THE
DS3 W
ANDER
R
EQUIREMENTS
PER
ANSI T1.105.03
B
-1997. ............................................. 117
9.7 A R
EVIEW
OF
THE
I
NTRINSIC
J
ITTER
AND
W
ANDER
C
APABILITIES
OF
THE
XRT75L03D
IN
A
TYPICAL
SYSTEM
APPLI
-
CATION
............................................................................................................................................................................ 117
9.7.1 Intrinsic Jitter Test results .............................................................................................................. 117
T
ABLE
32: S
UMMARY
OF
"C
ATEGORY
I I
NTRINSIC
J
ITTER
T
EST
R
ESULTS
"
FOR
SONET/DS3 A
PPLICATIONS
..... 117
9.7.2 Wander Measurement Test Results ............................................................................................... 118
9.8 D
ESIGNING
WITH
THE
XRT75L03D ................................................................................................................. 118
9.8.1 How to design and configure the XRT75L03D to permit a system to meet the above-mentioned
Intrinsic Jitter and Wander requirements ..................................................................................................................... 118
Figure 57. Illustration of the XRT75L03D being connected to a Mapper IC for SONET De-Sync Applications ..
118
C
HANNEL
C
ONTROL
R
EGISTER
- C
HANNEL
0 A
DDRESS
L
OCATION
= 0
X
06 ................................................. 119
C
HANNEL
1 A
DDRESS
L
OCATION
= 0
X
0E ......................................... 119
C
HANNEL
2 A
DDRESS
L
OCATION
= 0
X
16 ......................................... 119
C
HANNEL
C
ONTROL
R
EGISTER
- C
HANNEL
0 A
DDRESS
L
OCATION
= 0
X
06 ................................................. 120
C
HANNEL
1 A
DDRESS
L
OCATION
= 0
X
0E .............................................. 120
C
HANNEL
2 A
DDRESS
L
OCATION
= 0
X
16 ............................................... 120
J
ITTER
A
TTENUATOR
C
ONTROL
R
EGISTER
- (C
HANNEL
0 A
DDRESS
L
OCATION
= 0
X
07 ............................... 120
C
HANNEL
1 A
DDRESS
L
OCATION
= 0
X
0F .................................. 120
C
HANNEL
2 A
DDRESS
L
OCATION
= 0
X
17 .................................. 120
9.8.2 Recommendations on Pre-Processing the Gapped Clocks (from the Mapper/ASIC Device) prior to
routing this DS3 Clock and Data-Signals to the Transmit Inputs of the XRT75L03D .............................................. 121
J
ITTER
A
TTENUATOR
C
ONTROL
R
EGISTER
- C
HANNEL
0 A
DDRESS
L
OCATION
= 0
X
07 ................................ 121
C
HANNEL
1 A
DDRESS
L
OCATION
= 0
X
0F ............................ 121
C
HANNEL
2 A
DDRESS
L
OCATION
= 0
X
17 ............................ 121
J
ITTER
A
TTENUATOR
C
ONTROL
R
EGISTER
- C
HANNEL
0 A
DDRESS
L
OCATION
= 0
X
07 ................................ 121
C
HANNEL
1 A
DDRESS
L
OCATION
= 0
X
0F ........................... 121
C
HANNEL
2 A
DDRESS
L
OCATION
= 0
X
17 ........................... 121
Figure 58. Illustration of MINOR PATTERN P1 ............................................................................................ 122
Figure 59. Illustration of MINOR PATTERN P2 ............................................................................................ 123
Figure 60. Illustration of Procedure which is used to Synthesize MAJOR PATTERN A .............................. 123
Figure 61. Illustration of MINOR PATTERN P3 ............................................................................................ 124
Figure 62. Illustration of Procedure which is used to Synthesize PATTERN B ........................................... 124
Figure 63. Illustration of the SUPER PATTERN which is output via the "OC-N to DS3" Mapper IC ............ 125
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75L03DES 功能描述:時鐘合成器/抖動清除器 3 CH T3/E3/STS1 LIU+DESYNCH3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L03DIV 功能描述:外圍驅(qū)動器與原件 - PCI 3CHNNEL E3/DS3/STS 1 SONET DE-SYNCH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L03DIV-F 功能描述:外圍驅(qū)動器與原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L03DIVTR 功能描述:時鐘合成器/抖動清除器 3CHNNEL E3/DS3/STS 1 SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L03DIVTR-F 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
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