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參數(shù)資料
| 型號(hào)： | XRT75R12DIB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PBGA420 |
| 封裝： | 35 X 35 MM, TBGA-420 |
| 文件頁(yè)數(shù)： | 91/131頁(yè) |
| 文件大?。?/td> | 717K |
| 代理商： | XRT75R12DIB |
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PRELIMINARY
XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. P1.0.1
86
this SDH signal arrives at the remote PTE, this DS3 or E3 signal will then be extracted from the SDH signal,
and will be output to some other DS3/E3 Terminal Equipment for further processing.
Figure 37 presents an illustration of this approach to transporting DS3 data over a SONET Network
As mentioned above a DS3 or E3 signal will be asynchronously mapped into a SONET or SDH signal and then
transported over the SONET or SDH network. At the remote PTE this DS3 or E3 signal will be extracted (or
de-mapped) from this SONET or SDH signal, where it will then be routed to DS3 or E3 terminal equipment for
further processing.
In order to insure that this "de-mapped" DS3 or E3 signal can be routed to any industry-standard DS3 or E3
terminal equipment, without any complications or adverse effect on the network, the Telcordia and ITU-T
standard committees have specified some limits on both the Intrinsic Jitter and Wander that may exist within
these DS3 or E3 signals as they are de-mapped from SONET/SDH. As a consequence, all PTEs that maps
and de-mapped DS3/E3 signals into/from SONET/SDH must be designed such that the DS3 or E3 data that is
de-mapped from SONET/SDH by these PTEs must meet these Intrinsic Jitter and Wander requirements.
As mentioned above, the LIU can assist the System Designer (of SONET/SDH PTE) by ensuring that their
design will meet these Intrinsic Jitter and Wander requirements.
This section of the data sheet will present the following information to the user.
Some background information on Mapping DS3/E3 signals into SONET/SDH and de-mapping DS3/E3
signals from SONET/SDH.
A brief discussion on the causes of jitter and wander within a DS3 or E3 signal that mapped into a SONET/
SDH signal, and is transported across the SONET/SDH Network.
A brief review of these Intrinsic Jitter and Wander requirements in both SONET and SDH applications.
A brief review on the Intrinsic Jitter and Wander measurement results (of a de-mapped DS3 or E3 signal)
whenever the LIU device is used in a system design.
A detailed discussion on how to design with and configure the LIU device such that the end-system will meet
these Intrinsic Jitter and Wander requirements.
F
IGURE
37. A S
IMPLE
I
LLUSTRATION
OF
A
DS3
SIGNAL
BEING
MAPPED
INTO
AND
TRANSPORTED
OVER
THE
SONET
N
ETWORK
PTE
PTE
SONET
Network
DS3 Data
DS3 Data
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75R12DIB-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12 Channel 3.3V-5V temp -45 to 85C RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT75R12DIB-L | 功能描述:LIN 收發(fā)器 Synch RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| XRT75R12ES | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 12CH T3/E3/STS1LIUJA 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75R12IB | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 12CH E3/DS3/STS W/JITTER R3 TECH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75R12IB-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 12 Channel 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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