XRT79L71
REV. P1.0.3
PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
á
354
TRANSMIT ATM CELL PROCESSOR BLOCK - TRANSMIT ATM CELL INSERTION/EXTRACTION
MEMORY CONTROL REGISTER (0X1F13)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Unused
Transmit Cell
Extraction
Memory
RESET*
Transmit Cell
Extraction
Memory
CLAV
Transmit Cell
Insertion
Memory
RESET*
Transmit Cell
Insertion
Memory
ROOM
Transmit Cell
Insertion
Memory
WSOC
R/O
R/O
R/O
R/W
R/O
R/W
R/O
W/O
0
0
0
1
0
1
0
0
B
IT
N
UMBER
N
AME
T
YPE
D
ESCRIPTION
7-5
Unused
4
Transmit Cell Extraction
Memory RESET*
R/W
Transmit Cell Extraction Memory RESET*:
This READ/WRITE bit-field permits the user to perform a REST
operation to the Transmit Cell Extraction Memory.
If the user writes a "1-to-0 transition" into this bit-field, then the fol-
lowing events will occur.
a.
All of the contents of the Transmit Cell Extraction Memory will
be flushed.
b.
All READ and WRITE pointers will be reset to their default
positions.
N
OTE
:
Following this RESET event, the user must write the value "1"
into this bit-field in order to enable normal operation within
the Transmit Cell Extraction Memory
3
Transmit Cell Extraction
Memory CLAV
R/O
Transmit Cell Extraction Memory - Cell Available Indicator:
This READ-ONLY bit-field indicates whether or not there is at least
ATM cell of data (residing within the Transmit Cell Extraction Mem-
ory) that needs to be read out via the Microprocessor Interface.
0 - Indicates that the Transmit Cell Extraction Memory is empty and
contains no ATM cell data.
1 - Indicates that the Transmit Cell Extraction Memory contains at
least one ATM cell of data that needs to be read out.
N
OTE
:
The user should validate each ATM cell that is being read out
from the Transmit Cell Extraction memory by checking the
state of this bit-field prior to reading out the contents of ATM
cell data residing within the Transmit Cell Extraction Memory
2
Transmit Cell Insertion
Memory RESET*
R/W
Transmit Cell Insertion Memory RESET*:
This READ/WRITE bit-field permits the user to perform a RESET
operation to the Transmit Cell Insertion Memory.
If the user writes a "1-to-0 transition" into this bit-field, then the fol-
lowing events will occur.
a.
All of the contents of the Transmit Cell Insertion Memory will
be flushed.
b.
All READ and WRITE pointers will be reset to their default
positions.
N
OTE
:
Following this RESET event, the user must write the value "1"
into this bit-field in order to enable normal operation of the
Transmit Cell Insertion Memory.