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1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
PRELIMINARY
XRT79L71
REV. P1.0.3
87
RECEIVE UTOPIA INTERFACE BLOCK
This section presents the Register Description/Address Map of the control registers associated with the
Receive UTOPIA/POS-PHY Interface block.
T
ABLE
15: R
ECEIVE
UTOPIA/POS-PHY I
NTERFACE
B
LOCK
- R
EGISTER
/A
DDRESS
M
AP
A
DDRESS
L
OCATION
R
EGISTER
N
AME
T
YPE
D
EFAULT
V
ALUE
R
ECEIVE
UTOPIA/POS-PHY- C
ONTROL
R
EGISTERS
0x0501
Receive UTOPIA/POS-PHY Control Register - Byte 2
R/W
0x00
0x0502
Receive UTOPIA/POS-PHY Control Register - Byte 1
R/W
0x00
0x0503
Receive UTOPIA/POS-PHY Control Register - Byte 0
R/W
0x00
0x0504 - 0x0512
Reserved
R/O
0x00
0x0513
Receive UTOPIA Port Address Register
R/W
0x00
0x0514 - 0x0516
Reserved
R/O
0x00
0x0517
Receive UTOPIA Port Number Register
R/W
0x00
0x0518 - 0x0580
Reserved
R/O
0x00
RECEIVE UTOPIA/POS-PHY CONTROL REGISTER - BYTE 0 (ADDRESS = 0X0503)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
UTOPIA
Level 3
Disable
Multi-PHY
Polling Enable
Back to Back
Polling Enable
Direct Status
Indication
Enable
UTOPIA/POS-PHY
Data Bus Width
Cell Size[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
1
0
0
1
1
1
1
B
IT
N
UMBER
N
AME
T
YPE
D
ESCRIPTION
7
UTOPIA Level 3 Disable
R/W
6
Multi-PHY Polling Enable
R/W
Multi-PHY Polling Enable:
This READ/WRITE bit-field permits the user to either enable or
disable Multi-PHY Polling for the Receive UTOPIA Interface
block. If the user implements this feature (and configures the
XRT79L71 device to operate in the Multi-PHY Mode) then the
RxUClav output pin will be driven (either "high" or "low") based
upon the fill-status of the Receive FIFO within the Channel that
corresponds to the "Receive UTOPIA Address" that is currently
being applied to the "RxUAddr[4:0]" input pins.
If the user does not implement this feature (and then configures
the XRT79L71 device to operate in the Single-PHY Mode), then
the "RxUClav" output pin will unconditionally reflect the "Receive
FIFO fill-status" for Channel 0. No attention will be paid to the
address values placed upon the "RxUAddr[4:0]" input pins.
0 - Configures the Receive UTOPIA Interface block to operate in
the Single-PHY Mode.
1 - Configures the Receive UTOPIA Interface block to operate in
the Multi-PHY Mode.