參數(shù)資料
型號: XRT79L73IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
中文描述: ATM NETWORK INTERFACE, PBGA456
封裝: 27 X 27 MM, 1 MM PITCH, PLASTIC, BGA-456
文件頁數(shù): 6/71頁
文件大?。?/td> 495K
代理商: XRT79L73IB
XRT79L73
REV. P1.0.0
PRELIMINARY
3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
t
4
PIN DESCRIPTIONS
P
IN
#
N
AME
TYPE
D
ESCRIPTION
MICROPROCESSOR INTERFACE
AB26
AC26
AD26
AB25
AA24
AD25
AC25
AB24
AF25
AE25
AF24
AE24
AD24
AC24
AF23
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
I
Address Bus Input pins Microprocessor Interface:
These direct address pins are used to select the on-chip Framer/UNI registers and
RAM space for READ and WRITE Operations with the Microprocessor.
R22
T24
T25
T26
U22
U23
U24
U25
D0
D1
D2
D3
D4
D5
D6
D7
I/O
Bi-Directional Data Bus pins Microprocessor Interface:
These pins are used to drive and receive data over the bi-directional data bus.
AB23
ALE/AS
I
Address Latch Enable/Address Strobe:
This input pin is used to latch the address present at the Microprocessor Interface
Address Bus pins A[14:0] into the Framer/UNI Microprocessor Interface block and to
indicate the start of a READ or WRITE cycle. This input pin is active high, in the Intel
Mode and active low in the Motorola Mode.
AE23
CS
I
Chip Select Input:
The user must assert this active low signal in order to select the Microprocessor
Interface for READ and WRITE operations between the Microprocessor and the UNI/
Framer on-chip registers and RAM locations.
R23
INT
O
Interrupt Request Output:
This open-drain, active-low output signal will be asserted when the Framer/UNI
device is requesting interrupt service from the Microprocessor. This output pin
should typically be connected to the Interrupt Request input of the Microprocessor.
AD23
RD/DS
I
READ Strobe Intel Mode:
If the Microprocessor Interface is operating in the Intel Mode, then this input pin will
function as the RD (READ Strobe) input signal from the Microprocessor. Once this
active-low signal is asserted, then the Framer/UNI will place the contents of the
addressed register within the Framer/UNI IC on the Microprocessor Bi-directional
Data Bus D[7:0]. When this signal is negated, the Data Bus will be tri-stated.
Data Strobe Motorola Mode:
If the Microprocessor Interface is operating in the Motorola Mode, then this input will
function as the DS (Data Strobe) signal.
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