- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376462 > XRT79L74 (Exar Corporation) 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC PDF資料下載
參數(shù)資料
| 型號： | XRT79L74 |
| 廠商： | Exar Corporation |
| 英文描述： | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| 中文描述： | 4 -通道DS3/E3自動柜員機用戶到網(wǎng)絡(luò)接口/ Combo IC對購買力平價 |
| 文件頁數(shù)： | 33/70頁 |
| 文件大?。?/td> | 547K |
| 代理商： | XRT79L74 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當(dāng)前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁
PRELIMINARY
XRT79L74
REV. P1.0.0
4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
31
N4
K22
R3
M23
RxPOH_Clk1/
RxClk1/
RxNibClk1
RxPOH_Clk2/
RxClk2/
RxNibClk2
RxPOH_Clk3/
RxClk3/
RxNibClk3
RxPOH_Clk4/
RxClk4/
RxNibClk4
O
O
O
O
Receive PLCP Path Overhead Serial Port Clock output/Receive Nibble-Par-
allel Output port clock/Receive Serial Clock output:
The function of these output pins depend upon whether the XRT79L74 has
been configured to operate in the ATM/PLCP Mode or the Clear-Channel
Framer Mode.
ATM/PLCP Mode - RxPOH_Clk:
These output clock pins along with RxPOH, RxPOHFrame and RxPOHIns pins
comprise the Receive PLCP Frame POH Byte serial output port. All POH (Path
Overhead) data that is output via the RxPOH output pin is updated on the rising
edge of these clock signals.
N
OTE
:
These output signals are inactive if the XRT79L74 has been configured
to operate in the Direct-Mapped ATM Mode.
Clear-Channel Framer Mode - RxClk:
These output pins are active whenever the XRT79L74 has been configured to
operate in either the Serial or Nibble Parallel Mode, as is described
below.Clear-Channel Framer/Serial Mode - RxClkIn this serial mode, these out-
puts are a 44.736MHz clock output signal (for DS3 applications) or 34.368MHz
clock output signal (for E3 applications). The Receive Payload Data Output
Interface will update the data via the RxSer output pin, upon the rising edge of
these clock signals.
The user is advised to design (or configure) the local terminal equipment to
sample the RxSer data, upon the falling edge of these clock signals.
Clear-Channel Framer/Nibble-Parallel Mode - RxNibClk:
In the Nibble-Parallel Mode, the XRT79L74 will derive these clock signals from
the RxLineClk signal. The XRT79L74 will pulse these clock signals 1176 times
for each inbound DS3 frame or 1074 times for each inbound E3/ITU-T G.832
frame or 384 times for each inbound E3/ITU-T G.751 frame. The Receive Pay-
load Data Output Interface block will update the data on the RxNibn[3:0] output
upon the falling edge of these clock signals.
The user is advised to design (or configure) the local terminal equipment to
sample the data on the RxNibn[3:0] output pins, upon the rising edge of these
clock signals.
F2
A25
H2
E23
RxPOHFrame1
RxPOHFrame2
RxPOHFrame3
RxPOHFrame4
O
O
O
O
Receive PLCP Frame POH Serial Output Port - Frame Indicator:
These output pins along with the RxPOH RxPOHClk and RxPOHIns pins com-
prise the Receive PLCP Frame POH Byte serial output port. These output pins
provide framing information to external circuitry receiving and processing this
POH (Path Overhead) data, by pulsing "High" whenever the first bit of the Z6
byte is being output via the RxPOH output pins. These pins are "Low" at all
other times during this PLCP POH Framing cycle.
N
OTE
:
These output pins are only active if the XRT79L74 has been configured
to operate in the ATM/PLCP Modes.
P
IN
#
N
AME
TYPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT79L74IB | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT8000ID | Clock Synchronizer/Adapter for Communications |
| XRT8000 | Clock Synchronizer/Adapter for Communications(用于通訊的時鐘同步設(shè)備/調(diào)整器) |
| XRT8001 | WAN Clock for T1 and E1 Systems |
| XRT8001ID | WAN Clock for T1 and E1 Systems |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT79L74IB | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT8000 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Clock Synchronizer/Adapter for Communications |
| XRT8000_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Clock Synchronizer/Adapter for Communications |
| XRT8000D | 制造商:EXAR 制造商全稱:EXAR 功能描述:CLOCK SYNCHRONIZER/ADAPTER FOR COMMUNICATIONS |
| XRT8000ES | 功能描述:鎖相環(huán) - PLL WAN CLOCK RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。