參數(shù)資料
型號(hào): XRT79L74
廠商: Exar Corporation
英文描述: 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
中文描述: 4 -通道DS3/E3自動(dòng)柜員機(jī)用戶到網(wǎng)絡(luò)接口/ Combo IC對(duì)購(gòu)買力平價(jià)
文件頁(yè)數(shù): 67/70頁(yè)
文件大?。?/td> 547K
代理商: XRT79L74
PRELIMINARY
XRT79L74
REV. P1.0.0
4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
65
RECEIVE UTOPIA INTERFACE
RECEIVE UTOPIA INTERFACE
The purpose of the Receive UTOPIA Interface block is to function as either a Standard UTOPIA Level 1, 2 or 3
Interface as it outputs ATM cell data to either an ATM Layer or ATM Adaptation Layer Processor.
F
IGURE
21. T
IMING
D
IAGRAM
FOR
THE
R
ECEIVE
UTOPIA I
NTERFACE
B
LOCK
T
ABLE
12: T
IMING
I
NFORMATION
FOR
THE
R
ECEIVE
UTOPIA I
NTERFACE
B
LOCK
Symbol
P
ARAMETER
M
IN
.
T
YP
M
AX
.
U
NITS
Receive UTOPIA Interface Block (See Figure 22)
t53
Delay time from rising edge of RxUClk to Data Valid at RxU-
Data[15:0]
2.7
12
ns
t54
Rx UTOPIA Read Enable setup time to rising edge of RxUClk
4
ns
t55
Delay time from rising edge of RxUClk to valid RxUPrty bit
2.9
9.8
ns
t56
Delay time from rising edge of RxUClk to valid RxUSoC bit
3.5
9.7
ns
t57
Delay time from Read Enable false to Data Bus being tri-stated
1
11.5
16
ns
t58
Delay time from Read Enable false to RxUPrty bit being tri-
stated
1
12
16
ns
RxUData[15:0]
RxUEn*
RxUPrty
RxUSoC
RxUClk
t54
t57
RxUClav
t62
t63
t53
DATA VALID
t55
t58
t59
t56
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