參數(shù)資料
型號: XRT83SL38IB-F
廠商: Exar Corporation
文件頁數(shù): 44/88頁
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 OCTAL 225BGA
標準包裝: 84
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應商設備封裝: 225-BGA(19x19)
包裝: 托盤
XRT83SL38
47
REV. 1.0.2
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
MICROPROCESSOR REGISTER TABLES
The microprocessor interface consists of 256 addressable locations. Each channel uses 16 dedicated 8 byte
registers for independent programming and control. There are four additional registers for global control of all
channels and two registers for device identification and revision numbers. The remaining registers are for
factory test and future expansion. The control register map and the function of the individual bits are
summarized in Table 17 and Table 18 respectively.
TABLE 17: MICROPROCESSOR REGISTER ADDRESS
REGISTER NUMBER
REGISTER ADDRESS
FUNCTION
HEX
BINARY
0 - 15
0x00 - 0x0F
00000000 - 00001111
Channel 0 Control Registers
16 - 31
0x10 -0x1F
00010000 - 00011111
Channel 1 Control Registers
32 - 47
0x20 - 0x2F
00100000 - 00101111
Channel 2 Control Registers
48 - 63
0x30 - 0x3F
00110000 - 00111111
Channel 3 Control Registers
64 - 79
0x40 - 0x4F
01000000 - 01001111
Channel 4 Control Registers
80 - 95
0x50 - 0x5F
01010000 - 01011111
Channel 5 Control Registers
96-111
0x60 - 0x6F
01100000 - 01101111
Channel 6 Control Registers
112 - 127
0x70 - 0x7F
01110000 - 01111111
Channel 7 Control Registers
128 - 131
0x80 - 0x83
10000000 - 10000011
Command Control registers for all 8 channels
132 -139
0x84 - 0x8B
10000100 - 10001011
R/W registers reserved for testing channels 0-3
140 - 191
0x8C - 0xBF
10001100 - 10111111
Reserved
192
0xC0
11000000
Command Control register for all 8 channels
193 - 195
0xC1 - 0xC3
11000001 - 11000011
Reserved
196 - 203
0xC4 - 0xCB
11000100 - 11001011
R/W registers reserved for testing channels 4-7
204 - 253
0xCC - 0xFD
11001100 - 11111101
Reserved
254
0xFE
11111110
Device ID
255
0xFF
11111111
Revision ID
TABLE 18: MICROPROCESSOR REGISTER BIT DESCRIPTION
REG. #
ADDRESS
REG.
TYPE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Channel 0 Control Registers
0
00000000
Hex 0x00
R/W
Reserved
RXON_n
EQC4_n
EQC3_n
EQC2_n
EQC1_n
EQC0_n
1
00000001
Hex 0x01
R/W
RXTSEL_n
TXTSEL_n
TERSEL1_n
TERSEL0_n
JASEL1_n
JASEL0_n
JABW_n
FIFOS_n
2
00000010
Hex 0x02
R/W
INVQRSS_n
TXTEST2_n
TXTEST1_n
TXTEST0_n
TXON_n
LOOP2_n
LOOP1_n
LOOP0_n
3
00000011
Hex 0x03
R/W
NLCDE1_n
NLCDE0_n
CODES_n
RXRES1_n
RXRES0_n
INSBPV_n
INSBER_n
TRATIO_n
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