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參數(shù)資料
| 型號： | XRT91L33IGTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIRATE CDR 20TSSOP |
| 標準包裝： | 2,500 |
| 類型： | 時鐘和數(shù)據(jù)恢復（CDR），時鐘/頻率同步器，多路復用器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH |
| 輸入： | LVDS，LVPECL |
| 輸出： | LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 622.08MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
XRT91L33
7
REV. V1.0.0
STS-12/STS-3 MULTIRATE CLOCK AND DATA RECOVERY UNIT
FIGURE 3. CONTROL DIAGRAM FOR SIGNAL DETECTION CIRCUIT AND PLL TEST OPERATION
2.6
Lock Detection
XRT91L33 features a PLL lock detection circuit. The lock detect (LOCK) output goes HIGH to indicate that the
PLL is locked to the serial data input and valid data and clock are present at the high-speed differential output.
The LOCK output will go LOW if either the LOCKTOREFN or the SIGD input is forced LOW. Additionally,
LOCK will also go low if the incoming data frequency is more than +/-500ppm away from the reference clock
frequency (REFCK x 32 in OC12 mode, REFCLK x 8 in OC3 mode). When LOCK output is driven LOW, the
VCO is forced to lock to REFCK and then released to lock on the incoming data. If the incoming data frequency
remains outside the +/-500ppm window, the training mode is repeated. Debounce logic stabilizes the LOCK
output pin to stay LOW for incoming frequencies well beyond the +/-500ppm window.
2.7
PLL Test Operation
The TEST pin is intended for use in production test and should be set at logic LOW in normal operation. If both
TEST and STS12_MODE pins are set to logic HIGH, XRT91L33 will bypass the PLL and present an inverted
version of the REFCK to the clock output RXCLKOP/N. REFCK’s rising edge is used to capture the input data
and transmit data to RXDOP/N. This bypass test operation can be used to facilitate board level debugging
process.
0
1
LOS (Internal)
SIGD
LCKTOREFN
TEST
STS12_MODE
REFCK
PLL Clock
(Internal)
RXDIP/N
22
2
RXCLKOP/N
RXDOP/N
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L34 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR |
| XRT91L34ES | 功能描述:外圍驅(qū)動器與原件 - PCI 4 CHOC12/STM4 OC3/STM1 CDR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT91L34IV | 功能描述:計時器和支持產(chǎn)品 4CH OC12/STM4 OC3/STM1CDR RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| XRT91L34IVF | 制造商:Exar Corporation 功能描述:CDR 51.84Mbps/155.52Mbps/622.08Mbps SONET/SDH 128-Pin LQFP 制造商:EXAR 功能描述:CDR 51.84Mbps/155.52Mbps/622.08Mbps SONET/SDH 128-Pin LQFP |
| XRT91L34IV-F | 功能描述:網(wǎng)絡控制器與處理器 IC 8-Bit TTL 1.8V temp -45 to 85C;UART RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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