XRT91L33
11
REV. V1.0.0
STS-12/STS-3 MULTIRATE CLOCK AND DATA RECOVERY UNIT
3.5
AC Characteristics
TABLE 9: LVTTL INPUTS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
VIH
Input HIGH voltage
2.0
VDD
V
VIL
Input LOW voltage
0
0.8
V
IIH
Input HIGH current
-50
50
VIN = 2.75 V, VDD =
Maximum
IIL
Input LOW current
-50
50
VIN = 0.5 V, VDD =
Maximum
TABLE 10: PERFORMANCE SPECIFICATIONS
Test Condition: VDD = 3.3V + 5% unless otherwise specified
SYMBOL
PARAMETER
MIN
TYP
MAX
UNITS
CONDITIONS
f
VCO center frequency
622.08
MHz
fTOL
CDR’s reference clock frequency
-250
250
ppm
fTREF_CLK
OC-12/STS-12 capture range
-500
500
ppm
with respect to the fixed
reference frequency
CLKOUTDC
Clock output duty cycle
45
55
% UI
20% minimum transition
density
tLOCK
OC-12/STS-12 acquisition lock time
16
Valid REFCK and
device already pow-
ered up
tLOCK_R,
tLOCK_F
LOCK output rise and fall time
500
ps
10% to 90%, with 100
and 5 pF capacitive
equivalent load
JGEN_CLCK
RXCLKOP/N iitter generation
0.005
0.01
UIrms
JTOL
OC-12/STS-12 jitter tolerance
0.40
0.5
UI
Sinusoidal input jitter of
RXDIP/N from 250 KHz
to 5MHz
μA
μs
Ω