參數(shù)資料
型號： XRT91L80_0507
廠商： Exar Corporation
英文描述： 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述： 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器
文件頁數(shù)： 19/45頁
文件大?。?/td> 359K
代理商： XRT91L80_0507
xr
REV. P1.1.0
PRELIMINARY
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L80
17
2.6
When operating the 4-bit Differential bus in LVDS mode, a 402
external resistor is needed across XRES1P
and XRES1N to properly bias the RXDO[3:0]P/N and RXPCLKOP/N pins. Figure 7 shows the proper biasing
resistor installed.
Receive Parallel Interface LVDS Operation
2.7
The parallel receiver data outputs can be automatically forced "Low" during an LOSD condition to prevent data
chattering. However, the user must select the proper SDEXT polarity for the optical module used. By asserting
LOSDMUTE "High", the parallel receiver data outputs will be forced "Low" any time an LOSD condition occurs.
2.8
Parallel Receive Data Output Disable
Unlike LOSDMUTE, DISRD is used to asynchronously force the parallel receiver data outputs to zero,
regardless of the data input stream. By asserting DISRD "High", the parallel receiver data outputs will
immediately mute.
2.9
Receive Parallel Data Output Timing
The receive parallel data output from the STS-48/STM-16 receiver will adhere to the setup and hold times
shown in Figure 8 and Table 5.
F
IGURE
8. R
ECEIVE
P
ARALLEL
O
UTPUT
T
IMING
Parallel Receive Data Output Mute Upon LOSD
T
ABLE
5: R
ECEIVE
P
ARALLEL
D
ATA
AND
C
LOCK
O
UTPUT
T
IMING
S
PECIFICATIONS
F
IGURE
7. LVDS
EXTERNAL
BIASING
RESISTORS
S
YMBOL
P
ARAMETER
M
IN
T
YP
M
AX
U
NITS
t
RXPCLKO
Receive parallel clock output period (622.08 MHz non-FEC rate)
1608
ps
t
RXPCLKO
Receive parallel clock output period (666.51 MHz FEC rate)
1500
ps
t
RX_INV
RXPCLKOP/N "High" to data invalid window
200
ps
t
RX_DEL
RXPCLKOP/N "High" to data delay
200
ps
RX
DUTY
RXPCLKOP/N Duty Cycle
45
55
%
XRES1N
XRES1P
402
+/- 1 % tolerance
pin G1
pin F1
RXPCLKOP/N
RXDO[3:0]P/N
t
RX_INV
t
RXPCLKO
t
RX_INV
t
RX_DEL
SAMPLE WINDOW
t
RX_DEL
相關PDF資料
PDF描述
XRT91L80IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB 2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
相關代理商/技術參數(shù)
參數(shù)描述
XRT91L80ES 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L80IB 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L80IB-F 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L81 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
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