參數(shù)資料
型號： XWM8731EDS
廠商： Wolfson Microelectronics
元件分類： Codec
英文描述： Portable Internet Audion CODEC with Headphone Driver and Programmable Sample Rates
中文描述： 便攜式互聯(lián)網(wǎng)三極管編解碼器的耳機驅(qū)動器和可編程采樣率
文件頁數(shù)： 32/56頁
文件大?。?/td> 595K
代理商： XWM8731EDS
WM8731
Advanced Information
WOLFSON MICROELECTRONICS LTD
AI Rev 2.0 February 2001
32
DIGITAL AUDIO INTERFACES
WM8731 may be operated in either one of the 4 offered audio interface modes. These are:
Right justified
Left justified
I2S
DSP mode
All four of these modes are MSB first and operate with data 16 to 32 bits.
Note that 32 bit data is not supported in right justified mode.
The digital audio interface takes the data from the internal ADC digital filter and places it on the
ADCDAT output. ADCDAT is the formatted digital audio data stream output from the ADC digital
filters with left and right channels multiplexed together. ADCLRC is an alignment clock that controls
whether Left or Right channel data is present on the ADCDAT lines. ADCDAT and ADCLRC are
synchronous with the BCLK signal with each data bit transition signified by a BCLK high to low
transition. BCLK maybe an input or an output dependent on whether the device is in master or slave
mode. Refer to the MASTER/SLAVE OPERATION section
The digital audio interface also receives the digital audio data for the internal DAC digital filters on the
DACDAT input. DACDAT is the formatted digital audio data stream output to the DAC digital filters
with left and right channels multiplexed together. DACLRC is an alignment clock that controls
whether Left or Right channel data is present on DACDAT. DACDAT and DACLRC are synchronous
with the BCLK signal with each data bit transition signified by a BCLK high to low transition. DACDAT
is always an input. BCLK and DACLRC are either outputs or inputs depending whether the device is
in master or slave mode. Refer to the MASTER/SLAVE OPERATION section
There are four digital audio interface formats accommodated by the WM8731. These are shown in
the figures below. Refer to the Electrical Characteristic section for timing information.
Left Justified mode is where the MSB is available on the first rising edge of BCLK following a ADCLR
or DACLRC transition.
LEFT CHANNEL
RIGHT CHANNEL
DACLRC/
ADCLRC
BCLK
DACDAT/
ADCDAT
1/fs
n
3
2
1
n-2
n-1
LSB
MSB
n
3
2
1
n-2
n-1
LSB
MSB
Figure 25 Left Justified Mode
I2S mode is where the MSB is available on the 2nd rising edge of BCLK following a LRCLK
transition.
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XWM8733ED 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:102dB Stereo DAC
XWM8734EDS 功能描述:接口—CODEC Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
XWM8734EDS/R 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Stereo Audio CODEC
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XWM8734EDS/V 功能描述:接口—CODEC Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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