參數(shù)資料
型號: XWM8731EDS
廠商: Wolfson Microelectronics
元件分類: Codec
英文描述: Portable Internet Audion CODEC with Headphone Driver and Programmable Sample Rates
中文描述: 便攜式互聯(lián)網(wǎng)三極管編解碼器的耳機(jī)驅(qū)動器和可編程采樣率
文件頁數(shù): 43/56頁
文件大小: 595K
代理商: XWM8731EDS
WM8731
Advanced Information
WOLFSON MICROELECTRONICS LTD
AI Rev 2.0 February 2001
43
To control the WM8731 on the 2-wire bus the master control device must initiate a data transfer by
establishing a start condition, defined by a high to low transition on SDIN while SCLK remains high.
This indicates that an address and data transfer will follow. All peripherals on the 2-wire bus respond
to the start condition and shift in the next eight bits (7-bit address + R/W bit). The transfer is MSB
first. The 7-bit address consists of a 6-bit base address + a single programmable bit to select one of
two available addresses for this device (see table 24). If the correct address is received and the R/W
bit is
0
, indicating a write, then the WM8731 will respond by pulling SDIN low on the next clock pulse
(ACK). The WM8731 is a write only device and will only respond to the R/W bit indicating a write. If
the address is not recognised the device will return to the idle condition and wait for a new start
condition and valid address.
Once the WM8731 has acknowledged a correct address, the controller will send eight data bits (bits
B[15]-B[8]). WM8731 will then acknowledge the sent data by pulling SDIN low for one clock pulse.
The controller will then send the remaining eight data bits (bits B[7]-B[0]) and the WM8731 will then
acknowledge again by pulling SDIN low.
A stop condition is defined when there is a low to high transition on SDIN while SCLK is high. If a
start or stop condition is detected out of sequence at any point in the data transfer then the device
will jump to the idle condition.
After receiving a complete address and data sequence the WM8731 returns to the idle state and
waits for another start condition. Each write to a register requires the complete sequence of start
condition, device address and R/W bit followed by the 16 register address and data bits.
POWER DOWN MODES
The WM8731 contains power conservation modes in which various circuit blocks may be safely
powered down in order to conserve power. This is software programmable as shown in the table
below.
REGISTER
ADDRESS
0000110
Power Down
Control
BIT
LABEL
DEFAULT
DESCRIPTION
0
LINEINPD
1
Line Input Power Down
1 = Enable Power Down
0 = Disable Power Down
Microphone Input an Bias
Power Down
1 = Enable Power Down
0 = Disable Power Down
ADC Power Down
1 = Enable Power Down
0 = Disable Power Down
DAC Power Down
1 = Enable Power Down
0 = Disable Power Down
Line Output Power Down
1 = Enable Power Down
0 = Disable Power Down
Oscillator Power Down
1 = Enable Power Down
0 = Disable Power Down
CLKOUT power down
1 = Enable Power Down
0 = Disable Power Down
Power Off Device
1 = Device Power Off
0 = Device Power On
1
MICPD
1
2
ADCPD
1
3
DACPD
1
4
OUTPD
1
5
OSCPD
0
6
CLKOUTPD
0
7
POWEROFF
1
Table 25 Power Conservation Modes Software Control
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